Re: IBIS war stories Re: [SI-LIST] : response to semiconductor I

Roy Leventhal ([email protected])
Fri, 16 Jul 1999 15:53:09 -0500

Yep, yep,

Yet somehow if the job crosses over from primarily executing new products and
exciting new innovations to finding and fixing (dumb?) problems, we loose.

Where possible I'd like to get at the root cause of a class of problems, fix it
and make it go away and then get on with the productive stuff - you know, the
stuff that produces output that someone wants to pay me their hard earned money
for.

Best Regards,

Roy

Scott McMorrow <[email protected]> on 07/16/99 02:39:01 PM

Please respond to [email protected]

Sent by: Scott McMorrow <[email protected]>

To: [email protected]
cc: (Roy Leventhal/MW/US/3Com)
Subject: Re: IBIS war stories Re: [SI-LIST] : response to semiconductor I/O
edge rates

If it were easy
anyone could do this job.

Each one of us has our horror stories to tell about
trying to obtain "good" models from our vendors.
There are few nice tales to tell, whether we are talking
IBIS or Spice models.

regards,

scott mcmorrow
SiQual

Laurence Michaels wrote:

> "D. C. Sessions" wrote:
> >
> > Roy Leventhal wrote:
> > >
> > > Good points about etch length and edge rates.
> > >
> > > Somewhere else in the discussions the issue of programmable drive was also
> > > brought up. We are using progarmmable drive strength and a fixed series
source
> > > terminator (selected by daughter card loading) in at least one instance.
> > >
> > > Does anyone know a signal integrity simulator that is up to snuff on IBIS
3.2
> > > especially with regard to the conventions on programmable devices and has
> > > automated the handling of such parts?
> >
> > The EDA members of the IBIS committee report that their managements have
> > assigned IBIS 3.x support a low priority due to lack of customer demand.
> >
> > --
> > D. C. Sessions
> > [email protected]
> [rant type="teaching IC support about IBIS and SI" alt="preaching to the
> choir"]
> Argh... I'm having a hard enough time getting IBIS models from
> manufacturers NOW.
> If I hear one more "What diode characteristics are you talking about?
> Our output drivers don't have any diodes in them." Err... Yeah? No
> Substrate-bias diodes? Then what are these flat areas in the over- and
> under-shoot regions of the signal?
> Mice?
>
> Now they have yet another excuse. "We don't have enough demand for IBIS
> models, and the EDA tool vendors don't support 3.x."
>
> Do I give up and just make major simplifying assumptions, without
> knowing exactly how that would affect accuracy? Is it time for DFWTMTP?
> (Design For Way Too Many Termination Parts)
>
> It would be nice if manufacturers included all the data necessary to
> generate IBIS models inside the data book. Several come close, but not
> quite all the way, by including driver and pullup VI curves. Almost
> none of them spec resistive rise time, so I have to pick something that
> seems reasonable until I get a good answer from the vendor (possibly
> after teaching them what I'm asking for). I've seen vendors spec "Slew
> rate limitted" drivers without saying what they limitted it to. Those
> are a little difficult to model.
> [end rant]
>
> I'm assuming most people who've attempted to use and acquire IBIS models
> have had similar experiences. True?
> --
> Laurence Michaels
> For more help with your frame of reference,
> please contact a certified quantum mechanic.
>
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