[SI-LIST] : Problems with 3rd harmonics on Intel 820 Camino chipset?

Larry Smith ([email protected])
Thu, 10 Jun 1999 09:18:01 -0700 (PDT)

Derek - we need to get you tied into SI-list. Some good information comes
in over this channel. It looks like Intel is having trouble running rambus
at speed on a 6 layer board while their 133 MHz bus is running. I am not
surprized... The problems probably involve power distribution and plane
bounce. =20


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Subject: [SI-LIST] : Problems with 3rd harmonics on Intel 820 Camino chipse=
From: [email protected] (Per Torstein R=F8ine )
Date: 10 Jun 1999 10:36:23 +0200

As a hobby, I like to follow news and rumors about the PC platform.

The other day, "The Register" had a story called "Rambus Meltdown a
sorry tale of fudge, mudge and kludge" that may be interesting to
si-list readers (http://www.theregister.co.uk/990608-000022.html).

The rumors say that Intel can't get their new chipset running stable
with a 133MHz front side bus frequency and 800Mhz (400Mhz, on both
clock edges) Direct Rambus frequency. I can imagine that producing
inexpensive motherboards with such high frequencies is a challenge,
but it seems like Intel's problems are worse than expected.

I was wondering: Could Intel's problems be related to the fact that
the Rambus frequency is exactly the third harmonics of the FSB
frequency? Isn't this especially unfortunate noise-wise? Does any of
you have any experience to share regarding specific unfortunate
combinations of on-board frequencies?

The reason I was wondering about this is that, according to the
article, Intel is considering lowering the Direct Rambus speed to 712
MHz, which is 16 Rambus data words for each three FSB data words, down
from 18.

Per Torstein Roeine email: [email protected]
University of Oslo phone: +47 22 85 24 52
Dept. of Informatics, Microelectronics Group fax: +47 22 85 24 01
Box 1080 Blindern, N-0316 OSLO, NORWAY

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