[SI-LIST] : 2000 International Symposium on Quality of Electronic Design

Grebenkemper, John ([email protected])
Mon, 26 Apr 1999 09:34:29 -0700

2000 International Symposium on Quality of Electronic Design
March 20-22, 2000 , San Jose, California
Sponsored By:
IEEE Computer Society; Technical Committees on Design Automation & VLSI
In Cooperation With
Fabless Semiconductor Association & ACM/SigDA
The International Symposium on Quality of Electronic Design (ISQED),
provides a forum to present & exchange ideas and to promote research focused
entirely on Design Tools, Methodologies, Design Flows, and Design Techniques
employed to ensure the Quality of the Electronic Design. The conference
audiences are primarily the Designers of the VLSI Integrated Circuits &
Systems (SoC & IP) and those involved in the Development and/or Management
of EDA/CAD Tools and Design flows.
Growing complexity of electronic design, and emergence of integrated systems
on chips, fueled by on-going innovations in semiconductor processes, has led
to multitude of issues and challenges, all affecting the quality of the
product. Design quality paradigm encompasses compliance to the
specifications for Reliability and Yield, in addition to, Timing, and Power
Design Techniques, Methodologies, flows, and EDA/CAD Tools employed for
Quality Design,
Analysis, and Verifications, dealing with issues such as:

* R, L, C Extraction
* Signal Reflection
* Ground Bounce
* Cross-Talk
* Substrate Noise
* Voltage Drop
* Metal Migration
* High Frequency Effects
* Thermal effects
* Hot Carriers
* Plasma Induced Damage
* Proximity Correction & Phase Shift Methods
* Layout & Circuit Verifications (DRC/LVS)
* EOS/ESD, etc
* Tutorial Papers on Emerging Processes & Devices, and their Effect on
Reliability, Yield, and Performance of the VLSI Design.
* Quality of Modeling Abstractions and Methods (Behavioral, Delay, Power,
Noise, Etc.) for Micro & Macro IP Blocks, Interconnects, Transistors, Etc.
* Quality of IP Blocks & Libraries. Use of Layout Migration and Physical
Synthesis Tools
* Design for Testability, and Quality of Test Coverage
* Management of Design Database, Design Process, and Quality Implications of
Tools Interoperability

Submission Deadline August 5, 1999
Acceptance Notification September 5, 1999
Camera-Ready Paper Jan 10, 2000

Authors should either submit an extended abstracts of about 500 words each,
or full-length, original, unpublished papers (maximum 8 pages double spaced
with 1" borders) along with an abstract of at most 200 words and contact
author information (name, association, street/mailing address,
telephone/fax, e-mail). The paper should contain as many diagrams as needed
to illustrate the point.
Previously published papers or papers submitted for publication to other
conferences/journals will not be considered. Electronic submission via
e-mail is encouraged and is the preferred submission mode. Please email a
single, formatted for 8 1/2" x 11" paper, in ASCII or PDF format to
[email protected] MS Word files are preferred. Whichever format is used,
specify U.S. letter paper (8.5" x 11") and double-check the as-printed
appearance of
your abstract before sending it. Alternatively, you may send ten (10)
hardcopies of the abstract or full paper to:
Conference Secretary
P.O.Box 2879
Sunnyvale, CA 94087
For more information please visit the conference web site at
http://www.isqed.org or contact:
Dr. Ali Iramanesh, Conference Chair
Synopsys, 700 East Middlefield Road
Mountain View CA 94043-4033, USA
[email protected]

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