The job involves the design of bus architecture, termination strategy, and
analysis of bus driver technologies. The candidate should have experience
working on high performance systems and optimizing topology layouts for
high speed designs. Experience analyzing and selecting IC technology for
data, clock, I/O busses is desirable.
The candidate's functions will have a direct impact on many projects within
EMC. These include simulation and measurement of crosstalk, ground bounce,
and reflections at component, board and system levels. Experience using
field solvers for transmission line design and working with SPICE models is
highly desirable. Familiarity with HSPICE, Interconnectix, and IBIS models
are a plus. Three or more years of relevant experience and BSEE or MSEE
required.
If you are interested in joining our team, please send a resume to:
Fabrizio Zanella
EMC corporation
171 South Street
Hopkinton MA 01748
508-435-2075, x4645
Fax 508-497-8741
email: [email protected]
web - www.emc.com
Thanks and regards
Fabrizio Zanella
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