> Presented below is a numerical example, which utilizes Rise Time and
> Delay values within the PCI Bus specifications:
> Delay = 2.0 ns/ft
> Risetime = 1.5 ns
> Let k = 1/6, then:
> Critical Length = (1/6)(1.5 ns)/(2 ns/ft) = 1.5 Inches
You're going to have a VERY hard time (outside of edge-rate controlled
stuff like USB) finding anything with an edge that slow.
> Let us consider another example, selecting values applicable to the
> Rambus Channel:
> Delay = ( C )( Zo) = ( 2.9 pF/in)( 28 Ohms ) = 81.2 ps/in
> Rise Time = 400 ps
> Again letting k = 1/6, it follows:
> Critical Length = 0.821 Inches
> This result implies that trace segments and stubs smaller than 0.824
> inches are lumped, whereas those larger than 0.824 inches are classified
> as distributed. Such short critical lengths are often accompanied by
> numerous design and simulation challenges.
Your numbers are off. 800ps/in is the speed of light in vacuum.
Actual PWB speeds range from about 160ps/in for microstrips to
almost 200ps/in for striplines. For RAMBUS, because of the noise
constraints and low impedance, you have to figure on stripline
with the consequent 190+ ps/in. Also, the edge rates are not
_minimum_ 400ps; IIRC that's the receiver-guaranteed-max.
So figure on 250ps edges and 190 ps/in and you end up with an edge
in about 1.2 inches. That's a critical length at 1/6 of 200 mils,
not over 800.
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