[SI-LIST] : Improved online decoupling model

Christian S. Rode ([email protected])
Wed, 24 Mar 1999 10:46:59 -0800

Hello again.

I have what I hope is a much-improved version of the decoupling
simulation of last week. The following changes have been made:

* Simpler topology focused just on driver/bypass decoupling
issues. Several inductors have been disappeared.

* Plane impedance simply modeled by 200pF to local ground in
series with whatever is entered for power plane impedance. The
diagram shows TLs for this function but that really doesn't make
sense for a 2D medium anway. (Anybody know of any good
animations of supply currents bouncing off the edges of a PCB?)

* Bypass capacitor is modeled as a 6 section LC line to better reflect
the actual internal structure.

* Minimum documentation and click-link examples

Although bypass resonance isn't visible in the transient plots, it's now

clearly visible in the frequency plots (see examples).

I apologize for those trying to use the site today, since I was
with it and most likely your simulation didn't run. Please visit again


Comments gratefully appreciated.

Chris Rode

Hello, all.

I'm trying to build a pedagogical model of a single line driver, signal
line, termination
and its power environment. I'm building it as an ideal voltage source
with a finite
source resistance with symmetrical drive. I'm looking to highlight
packaging / bypass
issues, not the driver technology.

I'm interested in soliciting feedback on the workability of the model,
usable as an online
simulation (but currently documentation-free) at:


A couple of the values are intentionally provocative, such as the value
for the
inductance from the bypass cap to the ideal source, but I'm looking for
feedback on
the reality of the rest of the rat's nest of inductors.

Modeling the "rest of the world" in terms of a distant ideal source,
other bypass
capacitors, plane inductance / capacitance is what I'd most like
feedback on.

I'm also not sure where "power-supply resonance" would fit here - it
would seem to be
well below 100 MHz. I see instead a resonance between the output
and the power supply inductance(s).

An uneducated question: does anyone ever extend separate core / IO
power and
(especially) ground off-chip? I'm thinking a second, quiet, ground
reference plane
could be useful. Or is this another reason to go differential?

This is about a couple day's work so there are LOTS of bugs, including
and a peculiar spiking problem that happens to quiescent signals.

Thanks in advance for your comments / suggestions.

Chris Rode
[email protected]

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