Just wanted to summarize what i have read:
1. That the BGA does have inherent lower parasitic L and C (no bond
wires and no packaging leads) and therefore better interconnect
transmission properties, - some details were given in the paper
suggested by Ravider at IBM "Noise computation in single chip...." IEEE.
(Thanks Ravinder)
2. Those advantages can easily be squandered by -
- long leads to the closest decoupling site
- long leads to the interconnect junctures
3. Moral of the story ??????
In order to take advantage of BGA, which does carry a manufacturing
cost premium, very careful interconnect strategies my be thought out
and put in place.
We have not talked about thermal aspects, but this is another tricky
area of consideration - underfills, number of balls to xfer heat out,
thermal gnd planes, etc, etc
Any parting comments ????
Regards,
Greg
**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****