Re: [SI-LIST] : Bends in PCB traces (was: MECL System Design Handbook)

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From: Scott McMorrow ([email protected])
Date: Wed Jun 06 2001 - 12:09:36 PDT


"Ingraham, Andrew" wrote:

> Not necessarily, I think. If part of the corner effect is due to excess
> capacitance of the corner, then smaller trace widths result in there being
> less extra copper at that corner. With C per unit length unchanged, the
> effect of that excess C would indeed scale with trace width.

I stand corrected on this point, you and Eric Bogatin pointed out my
scaling error on corners.

The excess capacitance of a corner will scale. As the trace width is
decreased, the corner capacitance decreases as a square function.
As the trace height is adjusted to compensate for impedance, the
capacitance increases as a linear function. The combintation of
the two causes the excess capacitance at a corner to scale linearly
as the trace width is decreased. The precentage difference of
the discontinuity remains the same, but the length over which it
operates decreases as the trace is narrowed.

As a result, one could build a test board with 100 mil traces and
scale the results for any trace width. As the width approaches
the limit of zero, the excess capacitance is also zero. A fairly
simple extrapolation of the results at one trace width to any
other is possible.

Tom Dagastino's reflection should have about 8 times the area
under the curve as ours. (We use 12.5 mil traces. He uses 100 mil.)

Nevertheless, both of us are able to measure corners on boards,
and the associated losses.

best regards,


Scott McMorrow
Principal Engineer
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR  97062-3090
(503) 885-1231

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