From: Stuart Adams ([email protected])
Date: Tue May 29 2001 - 09:54:46 PDT
Anyone successfully used or simulated DDR SDRAMs
without parallel termination ???
I have an embedded design with 2 banks of four x16
devices on one DDR bus and second completely separate
DDR SDRAM bus with a single DDR SODIMM on it.
I would like to avoid using parallel termination
if possible to save space/power and get rid of
the Vtt regulator.
**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected] In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:12:10 PDT