RE: [SI-LIST] : Package power rating

From: Moses CHAN ([email protected])
Date: Tue May 22 2001 - 00:46:43 PDT

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Yuan,

The power rating for packages is based on the thermal requirement (keeping
the die temperature to a maximum of 125C). This depends on :
1. Die size
2. Type of PCB board (there is a JEDEC JC15 standard that defines this)
3. Air flow conditions

Therefore, the range that is given for the power rating is really the window
between max and min die sizes and the PCB.

The power requirement is only approximate, it will change if the device is
placed on an actual board in an actual application. A thermal simulation or
test can verify this.

Regards,
Moses Chan
CS2

-----Original Message-----
From: Zabinski, Patrick J. [mailto:[email protected]]
Sent: Monday, May 21, 2001 9:04 PM
To: [email protected]
Subject: RE: [SI-LIST] : Package power rating

Yuan,

If there is a definitive answer, I'd like to hear it as well.

I've seen vendors rate their packages' power handling ability
on such things as:

        * how hot can it get before it delaminates/melts;
        * thermal conductivity between die attach area to backside;
        * simple surface are of package backside; and/or
        * what's the hottest chip someone has ever put in their package.

If there is some industry-standard along these lines, I'd like to
see it.

Pat

> A seemingly trivial question: how to verify how much power a
> package can
> handle? Is it power cycling? Or Device functional testing? Or else?
>
> Any suggestions?
>
> Thanks,
>
> Yuan
>

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• Next message: Chandan: "Re: [SI-LIST] : PCI BUS: UNEQUAL LOADING"
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