RE: [SI-LIST] : RE: Edge rates

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From: Larry Miller ([email protected])
Date: Fri Apr 27 2001 - 13:38:37 PDT


In his Digital Black Magic book Dr Howard Johnson made a pretty good case
that from a signal integrity point it does not matter that much how you call
it. (I think there is a whole Appendix on it.)

For 2.5 and 3.3v logic I usually use 2.0 volts as the minimum logic "1"
reading and 0.8v for the maximum logic "0". The ASIC guys seem to use this,
and it is at least very comparable between measurements for many kinds of
signals (I try to avoid percentages as they violate the Law of The Shifting
Baseline (it takes a 100% increase to offset a 50% decrease)), especially if
you are going to connect the signals together.

Larry Miller

-----Original Message-----
From: Doug Hopperstad [mailto:[email protected]]
Sent: Friday, April 27, 2001 12:00 PM
To: [email protected]
Subject: [SI-LIST] : RE: Edge rates

I have a question regarding edge rates. Is there a standard for the edge
rate points, i.e. 90%/10% or a specific voltage point like 2v, 0.8 v? I have
some data sheets that indicate the edge rates are determined by the percent
method and other data sheets (SSTL) that call out for ViH/ViL point for the
markers. My Scope is defaulted at the 90/10 percent setting and if I use it,
I get fairly good timing numbers of ~ 600pS. However, the vendor of the
component is calling out to use Vref +/- 0.35 volts with Vref normally at
1.25 volts. If I measure the edges in the lab with that method, my timing is
an insane 180pS per the 0.7 volt delta. My overshoot is not reflective of
the faster edge rates.

Can anyone provide some insight into the different procedures called out in
the design specification books?

Doug Hopperstad

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