RE: [SI-LIST] : noise budgeting

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From: Dunbar, Tony ([email protected])
Date: Wed Mar 14 2001 - 11:31:44 PST


You may find the following 'oldie-but-goodie' (1996) article useful to you:

I actually have the original paper magazine containing the article so I
thought I would back-track into the EDN acrhives to see if I could find it
for you. I didn't have to go far, since I found a link to that article
directly at:

Look under the section "IBIS-related articles" (not that it is such) and
find "Noise budgets help maintain signal integrity in low-voltage systems"
(last bullet).

I also used to have another similar article that came from EDN, too, I
think, about the same time but I can't find it right now. If I find it
later, I'll let you know.

Ultimately, whatever guidance and individual preferences and experiences you
may receive in response to your e-mail, it will come down to your own
judgement, based on your system specifics, to apportion the budget to each
class of nets you are concerned about. For example, your actual board-level
crosstalk budget for a certain class of nets will be determined by your own
physical design parameters. Same for, say, SSO noise on a particular bus.
The above article will help you put it all into a general context and set
you on your way to addressing your own design.


-----Original Message-----
From: Perry Qu [mailto:[email protected]]
Sent: Wednesday, March 14, 2001 7:52 AM
Cc: [email protected]
Subject: [SI-LIST] : noise budgeting


I had a question about noise budgeting in SI design. As I understand,
the device noise margin varies for different devices, e.g., we have
noise margin of Voh (3.3V) - Vih(1.6 V) ~ 1.7 V for CMOS device. Out of
which, we have to budget for various type of noises, such as:

simutaneous switching noise;

Is there a guideline how much noise budget to be allocated to each type
of noise ? Also, there are different method to calculate the total
noise, e.g., direct sum up, which is a worse case design and root square
sum, which seems to be more realistic. Which method do you use in your
SI design ?

To complicate the issue, on a system level SI design, we may have to
allcoate noise budget for IC packagings, PCBs and other interconnects
(e.g., connectors). How is this done ?

Thanks in advance for your feedback.


Perry Qu

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