Re: [SI-LIST] : troubleshoot differential clock

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From: Cosmin Iorga ([email protected])
Date: Wed May 02 2001 - 14:03:29 PDT


Hi Perry,

at 200ps rise time probably the 0.8" you have between termination and
receiver is the major problem. I would also look into the decoupling
of 2.5V at the termination resistors, especially because XTK
simulations didn't show the problem as bad as the measurements.

Cosmin

> Date: Wed, 02 May 2001 16:26:58 -0400
> From: "Perry Qu" <[email protected]>
> X-Accept-Language: en
> MIME-Version: 1.0
> To: Cosmin Iorga <iorgac>
> CC: [email protected]
> Subject: Re: [SI-LIST] : troubleshoot differential clock
> Content-Transfer-Encoding: 7bit
>
> Cosmin:
>
> Each line was terminated at receiver side with 2 resistors:
> 61.9 ohm to gnd and 249 ohm to 2.5 V, which gives us 50 ohm total resistance.
> The termination is a bit far from the receiver (around 0.8 ").
>
> Thanks
>
> Perry
>
> Cosmin Iorga wrote:
>
> > Hi Perry,
> >
> > can you describe in more details the termination scheme?
> >
> > Cosmin
> >
> > > Date: Wed, 02 May 2001 15:30:57 -0400
> > > From: "Perry Qu" <[email protected]>
> > > X-Accept-Language: en
> > > MIME-Version: 1.0
> > > To: "[email protected]" <[email protected]>
> > > Subject: [SI-LIST] : troubleshoot differential clock
> > >
> > > Hi! Everyone:
> > >
> > > I have a case which need help from you guys:
> > >
> > > On one card, there is a LVPECL differential pair running from a buffer
> > > to the receiver. The total length of the pair is about 8 inches, with 50
> > > ohm termination at the receiver side. (2 resistors terminated to pwr/gnd
> > > for biasing also). The routing was not done properly, e.g., long
> > > parallel run with other differential pairs; unsymmetrical routing
> > > between the plus and minus, etc.
> > >
> > > In the lab, the signal measured at reciever side shows strong
> > > reflections, with non-monotonic points on the rising and falling edge,
> > > which is bad for clocks. The measurement is well repeatable and smells
> > > like some discontinueties problems. We did a simulation in XTK and we
> > > saw some reflections (not as bad). By adding a series termination at
> > > driver side (the driver is a really fast one, < 200 ps rise time), we
> > > manage to eliminate the reflections almost completely. However, we did
> > > not observe the same effect in the lab.
> > >
> > > The next thing we tried is to do some TDR measurement on the bare board.
> > > Since one of the TDR channel is not working properly, we can only
> > > measure the single-ended impedance. There is some dips here and there on
> > > both lines but none of them is bad enough to cause such bad signals at
> > > receiver side. We plan to do the the differential TDR once we have the
> > > sampling head repaired. But I doubt that is the reason.
> > >
> > > Really appreciate your comments/suggestions on this.
> > >
> > > Regards
> > >
> > > Perry Qu
>

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