From: D. C. Sessions ([email protected])
Date: Thu Apr 26 2001 - 19:56:14 PDT
JEDEC's JC-16 committee is in the process of revising the SSTL standards
to explicitly cover reflected-wave operation. One of the issues coming up
in the course of the work is that CMOS outputs are typically ill-behaved
during transitions (usually going to high impedance after one transistor
turns off and before the other turns on.)
There have been several proposals to specify envelopes for the Z/T response
(majorly ugly), ignoring the matter (nope), and so forth. Right now the best bet
seems to be specifying a (two?) resonant stubs driven to have reflections arrive
back at the driver in the midst of transition.
In other words, we're going to place bounds on the VSWR (you can stop laughing,
Ed. I had fun explaining to the kids that this wasn't exactly new and pointing them
to the ARRL handbook.)
The question is: since these won't be pure sinusoids (anything but!) what would be
a good metric for the resultant resonant-mode waveforms that would reflect (as it
were) the cumulative S/N ratio at the receiver?
D. C. Sessions,
Chair, JC-16
-- | The race is not always to the swift, nor the battle to the strong. | | Because the slow, feeble old codgers like me cheat. | +--------------- D. C. Sessions <[email protected]> --------------+**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
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