[SI-LIST] : I2C bus

From: raymond anderson ([email protected])
Date: Thu Apr 05 2001 - 12:00:37 PDT

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Hi,

Can anyone describe the electrical careabouts for the I2C bus
and the design of IO buffers for reliable electrical performance
and the associated tradeoffs involved with board design?

Regards,

Soujanna Sarkar

DSP Design Team, TI

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• Next message: Ray Anderson: "[SI-LIST] : HSTL Class 1 driver/receiver"
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• Maybe reply: Michael Nudelman: "RE: [SI-LIST] : I2C bus"

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