RE: [SI-LIST] : How to model effect of vias on nearby traces?

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From: Greim, Michael ([email protected])
Date: Thu Mar 22 2001 - 14:40:27 PST


Wouldn't part of the effect (perhaps a more significant
part) be how big the antipad is on the reference plane and
whether the signal in questions is routed over it or not?
I have seen some antipad requirements so large that a trace
could be routed over a wafer thin piece of plane to the
point that the trace is essentially routed over no reference
at all.

Comments?

Best Regards,

Michael C. Greim Sonus Networks
[email protected] 978-589-8336

Making the world safe for digital signals everywhere

And all this science I don't understand
It's just my job six days a week

The time is gone. The email's over
Thought I'd something more to say......

-----Original Message-----
From: Larry Miller [mailto:[email protected]]
Sent: Thursday, March 22, 2001 4:42 PM
To: 'Patel, Bhavesh'; SI_LIST (E-mail)
Subject: RE: [SI-LIST] : How to model effect of vias on nearby traces?

I have seen some high speed connector TDR plots where traces are routed
through pin fields on back/midplanes. This is similar to passing near a via,
even worse I would think. I have also done TDR's on our own boards.

The effect seems to be very small (a few % of 50 ohms) and of short duration
in time, which of course corresponds to very high frequencies (10's of GHz).

One view.

Larry Miller

-----Original Message-----
From: Patel, Bhavesh [mailto:[email protected]]
Sent: Wednesday, March 21, 2001 8:06 PM
To: SI_LIST (E-mail)
Subject: [SI-LIST] : How to model effect of vias on nearby traces?

Hi! I wanted to know how do I simulate the effect on the impedance..
reflection on a trace/signal when it is very close to a via. It does not go
thru the via but passes very close to it. Can I model this in HSPICE? And if
yes how/
Thanks in advance
Bhavesh

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