Re: [SI-LIST] : DIMM

From: KokTongTHAM ([email protected])
Date: Fri Mar 16 2001 - 11:16:44 PST

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Hi!

I am using a CPU, an ASIC and two SO-DIMMs (64M *2). CPU<=>ASIC is about
150mm and CPU<=>SO-DIMM is about 200mm.(see attachment file).
When data is read back from ASIC to the CPU, reflection wave from the
SO-DIMMs have some negative effect on the CPU(receiver)'s waveform. This
caused the delay between the ASIC and the CPU to increase.
The purpose of series resistor (47ohm) between CPU and SO-DIMM is to
prevent the reflection wave from SO-DIMM but it doesn't seem to have much
effect at all.
Can anyone give any suggestions on this??

Thanks.

Regards,
KT.THAM

At 午前 09:10 01/03/16 -0800, you wrote:
>Is this DDR, do you have multiple DIMMs, if it is DDR, is the driver
>Class I or Class II?
>
>Vinu
>
>KokTongTHAM wrote:
>
> > Dear SI Gurus,
> >
> > Can anybody tell me if any termination resistors required at the end
> > of the DIMM connectors for Data lines?
> >
> > Regards,
> > KT.THAM
> >
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• application/pdf attachment: wave.pdf

• application/pdf attachment: DataTopology.pdf

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