From: Su Ming TAI ([email protected])
Date: Mon Mar 12 2001 - 21:32:29 PST
Dear SI gurus,
There are some issues concerning the controller<=>memory that some of you
may be able to help me with.
The design is a controller connected to two SO-DIMMs.
SO-DIMM1 is a 256MB and SO-DIMM2 is a 64MB. Clock is rated at 80 MHz and
max delay is 6ns.
According to our simulator, the are some non-monotonic on the address and
some of the control lines.
In your opinion, will the non-monotonic effects compromise the SI of the
board especially the control lines?
Thank you.
Regards,
SuMing TAI
-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Su Ming, TAI ($BBW(B $B;WL@!K(B
ULTIMATE TECHNOLOGIES INC
Shindenchou 1462-6F, Nagano City,
Nagano Prefecture, JAPAN
380-0835
$B%"%k%F%#%a%$%H%F%/%N%m%8%#%:3t<02q<R(B
$B")(B380-0835 $BD9Ln;T?7EDD.(B1462-6F
TEL$B!'(B 026-267-7256 FAX$B!'(B 026-267-7259
E-mail [email protected]
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This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:11:11 PDT