1. Why is the diode capacitance a max with 0V at J2-2?
With no bias on the diode, there is a minimum thickness of the depletion layer between the P and N material. As reverse bias increases the depletion layer spreads, and like the plates of a capacitor, the farther away they are the lower the capacitance.
2. Why is the diode capacitance decreasing as voltage
at J2-2 (pin 2 of J2) increases?
3. Why is the diode reversed biased?
If it were forward biased it would have very little capacitance. Varicaps work in reverse bias mode.
4. What is C103 doing?
Preventing RF from the VFO from getting back into the 8 volt power supply.
5. Why is the voltage to J2 provided by the 78L08?
It is regulated to remove any variation from the power supply from changing the voltage thereby changing the vfo frequency. Ever heard a CW tone that chirped?
6. When rig is powered up, 8V is applied to the pot.
Since we have R and we have I, then we have power
applied to the 50K or 100K pot. It must thermally
heat up and slightly change its resistance value.
Why does this not affect the rest of the circuit,
i.e. the voltage at J2-2 does not change over time?
Very little current leaves the pot at the center tap. A reverse biased diode in series with a 1 meg resistor draws very little current. That tells me that power is dissapated evenly across the whole wiper surface of the pot. This way both sides change together with a net change in the voltage divider is zero
*****DANGEROUS QUESTION****** Do not try this at home.
7. Why must one be careful when using the clip lead
and not connect it between pins 1 and 3 of J2?
This will short out the +8 supply to ground. In theory the regulator should shut down without being damaged, but I won't try it.
8. On some rigs, you might see a small trimmer cap
in the Y5, RFC2, C28, and C29 part of the circuit. Why?
Tune out any deviation in the provided crystals. This circuit oscilates and mixes with the VFO to produce the transmitted carrier. It would fine tune the output frequency as it relates to VFO frequency.