JTAG CPLD Programmer

Having built the GW6BWX Low cost test card generator I needed to be able to program the CPLD. After looking around the Lattice web site and around the web for a couple of hours I came across a web page with a small JTAG programmer on a double sided board. However double sided boards are harder to produce so I've laid it out for a single sided board. The original article can be found here.

When using this small board with the Lattice software it only takes a matter of seconds to program the device. By moving a link on the jumper it should be possible you program Xilinx parts - althrough I must stress that I haven't tried this.

Circuit Diagram

My circuit diagram is fairly basic as there isn't too much to the circuit.

QtyValue PackageParts
6100R0603R1, R2, R3, R4, R5, R6
210k0603R7, R8
10.1u C1
11N4148 D1
125way Male D type X1


The JTAG programmer is built on a small single sided PCB. Through hole components are mounted on the top side, there are also 8 wire links to solder in. All surface mount components are mounted on the track side of the PCB. The 25 way male D-type is mounted on the edge of the PCB with each row of pins on either side of the PCB. The lower pins can be soldered onto the PCB directly with the two pins used on the upper row of pins connected to the PCB by wire links. The artwork should be printed out at 150dpi. Placement diagrams for the top and bottom show where the components should be mounted.


The software to use with this JTAG programmer is Lattice's ispVM system, which can be found on their web site. Watch out, the download is a little over 15Mb.

Back to Home Page

Just a quick disclaimer, if you fry something even if my design is wrong it is your problem! I have tried to make these details as accurate as possible but I accept no responsibility for any errors or omissions. There is no technical support for any of my projects.