TXsidetiny.jpg - 10915 Bytes    The DXR-700 Conversion / Transverter Project Update   RXsidetiny.jpg - 10450 Bytes


PLL  Controller Update ( Now we don't need the RF link  between the units...).

This part is the same as the previous update for the VCO changes but have left them in for ease of following. This will most likely be the last update as I feel that we have reached the best possible scenario for driving the system with the most simple arrangement yet.

This theme follows what I have done for the 10GHz unit. In fact, it uses the same board and micro. Makes sense since we now have one board that will do both units. All that changes is the code within the micro.
Step rate is at 2MHz due to the best phase noise performance  so far.
All procedures are very repeatable with predictable results.  
With simple mods, I have managed to get it to lock with the advantage of lower phase noise and stability.

You will need some Copper shim strap (thin), two  0p5  0805 SMD caps, small piece of overhead projector acetate sheet, nail polish, side cutters and some patience.

  1. Join the outer thin tracks so that the whole length of the line is increased to the max length. Do it for both sides.

    vcomods.JPG - 56164 Bytes
  2. Cut a small piece of copper shim strap to fit the thicker track in the middle. This piece should be able to cover the gaps to extend the overall length o the track.
  3. Apply a small dab of nail polish to glue down a small piece of acetate that will be slightly larger than the copper shim overhang, this is mainly for insulation purposes.
  4. Solder the foil down to just cover the slits in the thick track and extend up to the 2nd hole set in the ground plane pattern.
  5. Now add 0.5pF  0805 SMD caps to the other end of the filter section. There will be pads on the opposite side to the VCO transistor to easily fit the cap there. Solder the hot side of the cap first to anchor it and then the cold side as the ground plane soaks up heat and is harder to solder.
    On the VCO transistor side, add a 0.5pF across the cap that feeds the base of the transistor.

With the PLL set to run at 5616MHz, it should now lock with about 700 odd millivolts on the VCO varicap control voltage test point.

It should also run at 5760 as well with the voltage now up to about 1.2 volts or so.

Phase spurs maybe reduced by lifting the tab slightly to get best performance.

Setting up the transmitter section can be done by setting PLL to 5760 and peaking up the output section. Peaking is somewhat a custom affair but some guidelines can be seen in the photos.
Silver paint can be used to do this. (Beware that the paint has to dry before it becomes conductive). Tuning can be done by scraping off small bits at a time with a tooth pick to tune it.
In some other places, there are small bits of wire or copper strip to tune as well.

Hot spots that can be tuned can be found by using a small piece of TC wire poked in the end of the wooden cotton bud stick or similar. The TC wire should be small, about 5mm long approximately. Touch filter stubs to see what tunes to get a peak. Some will dip as they are de tuned.

The Controller

It is effectively the same as the 10Gig unit but the code image is different due to the architecture of the circuit with respect to prescaling and  multiplication factors. This has effects on the PLL numbering and several port assignments in code. Had some funnies with PLL not locking and the sequencer routine gave us a but of a fun time as well. So much for cut and paste coding!! Anyway one Monday night, we had success and was happy to ring Keith ZL1BQE to say it was all going.. (Must remember to send updated code to him (mental note)).. It's nice to have a backup in case of Mr Murphy who might visit my hard drive one day with catastrophic results!! :-)

We have had experiences in the past  where we had the following issues:-


We addressed the issues as follows..


VTCXOs and the ability to transceive properly.

Disable the RX VTCXO and back feed the buffered TX reference oscillator to the RX PLL reference input. It’s fairly easy to do by removing the single element 74HC04 buffer and cap couple through.

Disable the power supply to the ref osc in the RX as well.


Phase noise issues.

It has been found that using too higher division ratios causes the phase noise to be bad. Based on past generations / iterations, we have settled on 2MHz steps that results in a division ratio that gives a 666.666kHz reference at the PLL, multiplied by three effectively, gives us a 2 MHz step at 5.616GHz.


Beating PLLs

To fix this, we need to change the frequency so the two PLLs are not running on exactly the same frequency.

To do this, we use a 2MHz offset.

While the unit is in RX, the TX PLL will be the wanted LO frequency + 2MHz.

When in TX, the RX PLL will move up 2MHZ, so wanted LO + 2MHz.


Code can be got on email request  for those who can program a 68HC908qy4  with a UserMon  boot image before soldering to the board so that you can do a code upload in circuit. If not, micros could be supplied with usual cost of micro plus post and packaging, already programmed.

The following photos and attachments will give an idea of how it is all put together.   

boardcloseup.jpg - 98116 Bytes Finished unit.jpg - 64482 Bytes
The controller up close showing part placement. One regulator feeds both PLLs while the other feeds the TX or RX converter that is switched by the relay in the bottom left. Some parts mounted on the underside of the board. This is a further away pic showing the basic placement of the board and how it's mounted. The ribbon cable feeds the Clock / Data / E2 line to the RX PLL as well as supplies and 10MHz Ref Osc feed for the PLL.

Not shown is the pull up resistor on the image reject mixer pin. 10K pulled up to the RX 8V supply will give about a 10dB improvement in RX signal .

 

Attached here is a SCHEMATIC of the controller and the PCB OVERLAY as well as the Protel PCB PATTERN file for those who can generate their own PCBs. Please see my 925MHz transverter article on PCB tips.

Good Luck and happy constructing.

73's Simon.


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