Date: Sun Feb 11 2001 - 15:09:16 PST
I have a question related to the flight time measurement of GTL+ signals.
on the FrontSideBus between the Mobile Pentium III processor and the 440BX
Since the GTL signals are very short and have no termination, there is
seen at the Chipset end when the Processor is driving.
I have simulated this in XTK tool, with the processor as driver and the
chipset as the receiver.
I have measured the flight time on the rising edge. I have taken the
impedance to be 55ohms +/- 10% for simulations
After the processor reaches 1.0 volts or so, at the rising edge, the
waveform at the processor pin dips, and then rises.
Therefore after around 1.0 volts, the chipset appears to be leading the
processor which is wrong.
Is this happening due to change in impedance? can anyone explain.
In a case like this, how should the flight time be measured?
For measurement, should i consider the falling edge including a cycle of
ringing at the receiver end?
Can anybody explain?
looking forward to your replies and suggestions.
**** To unsubscribe from si-list or si-list-digest: send e-mail to
firstname.lastname@example.org. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:30:49 PDT