[SI-LIST] : PCI topology

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From: Bhavesh Patel (bpatel@cyras.com)
Date: Tue Jan 30 2001 - 18:02:34 PST


Hi! I had a question regarding PCI bus topology that I am trying to
simulate. I have a PCI controller and three PCI compliant interface devices.
The topology is
 <<...OLE_Obj...>>

P---> PCI controller
C--> connector
P1, P2, P3 are network processor with PCI interfaces. This bus is running at
33Mhz

P can drive/talk to any device on the bus and P1, P2, P3 can only talk to P
but not to each other, but when P1 is driving P2, P3 also will be listening.
Now, when I simulate with these trace lengths using idela 60ohm transmission
lines the signal especially when either P1 or P2 is driving is non-monotonic
at each of the receivers and takes a long time for the signal to settle
down.
Hence, I said with the given trace lengths this topology does not work. It
works if I reduce the trace lengths which will affect other things on the
board.
So, I used a topology with dual PCI driver concept i.e one PCI connected to
two chips P1 and P2 and the other connected to P3. The topology looks like

 <<...OLE_Obj...>>
P2 is connected before the connector. This topology works with the above
trace lengths.
The other topology is P connected to P3
 <<...OLE_Obj...>>
The PCI controller does support dual concept.

Now, my question:

1) If in simulations the signals look monotonic, settle delay is good should
I still worry about thing relevant to PCI because I know PCI is strict on
the stub lengths and the total trace lenght etc?
2) Also, I forgot to mention that I am using 10ohm resistor in series at
each device and this does help me in achieving the extra trace length. Am I
violating anything ?
3)What else should I look for?

Thanks and sorry for such a long email

Bhavesh

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