From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Mon Jan 22 2001 - 14:28:53 PST
On the one hand, I think it is not necessarily harmful to bypass power
planes together. After all, you may get that anyway to some degree through
the intrinsic capacitance of the board (depending on layup), though maybe
not large enough to cause instability in the voltage regulators. It is a
good point, though, that you need to watch out for such instabilities and
hopefully you are able to evaluate whether any capacitance might cause
problems with feedback loops.
Having all your planes at the same HF potential is good, so in some cases,
improving the bypassing between power planes might help that ... but only if
it doesn't screw up something else.
Also, think about whether the added capacitors provide a useful current
path. Is there any switching current that wants to go between 5V and 3.3V,
between 3.3V and 2.5V, etc.? If you have lots of signal traces referenced
to those planes that go through a cluster of vias, then there might be a lot
of return current that needs to go "directly" between power planes, and some
number of suitable caps might improve that. If all your high speed traces
are routed between GND layers, then maybe not.
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