From: Goferman Stas (email@example.com)
Date: Sun Jan 07 2001 - 09:15:49 PST
We are two undergraduate students working on a signal integrity project.
The field is new for us. The project is about simple signal integrity
phenomena, like reflection and crosstalk. We designed a PCB with various
that demonstrate these phenomena.
Our question is about end termination.
We've built a simple end termination configuration.
However, we have place the end-terminating resistor not so close to the
We would like to find how close to the end do we need to connect the
Since we cannot change the location of the resistor, we change the rise
a pulse generator. We are using a HP TDR. As we increase the rise time, we
get a better
behaviour of termination, and get a smaller sink on the TDR screen.
For each sink, TDR measures an excess capacitance created by stub.
For a perfect termination, there is
no excess capacitance. Is there any relation (equation) between this
excess capacitance and
the rise-time or the stub length ? We need some analytic formulas, if any.
We will appreciate if anyone could help us.
Stas and Alex
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