From: GARY ROSEN (firstname.lastname@example.org)
Date: Thu Dec 21 2000 - 17:03:10 PST
Can the on-chip inductance seen by a core
power supply be determined from an IBIS model?
Is it simply the parallel combination of all
the inductances of the power/ground pins?
Or do the package parasitics have to be
figured in as well (assuming all the above
info is in the model)?
- Gary Rosen
email@example.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:30:30 PDT