[SI-LIST] : Core parasitics

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From: GARY ROSEN (gmr@appsig.com)
Date: Thu Dec 21 2000 - 17:03:10 PST


Can the on-chip inductance seen by a core
power supply be determined from an IBIS model?
Is it simply the parallel combination of all
the inductances of the power/ground pins?
Or do the package parasitics have to be
figured in as well (assuming all the above
info is in the model)?

- Gary Rosen



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