RE: [SI-LIST] : Post layout simulations: "To do or not do them a nd when to do them..."

About this list Date view Thread view Subject view Author view

From: Loyer, Jeff W ([email protected])
Date: Thu Dec 07 2000 - 09:51:15 PST


I view post-layout simulations as another check which may or may not warn
you of troubles to come. I believe that, for the most part, post-layout
simulations have to make some very simplistic assumptions (vias are simply a
capacitance, for instance). This leads to a not-very-accurate simulation.
They may lead you to a false sense of security when they do pass.

If a post-layout simulation can easily be performed, I would do it.
Otherwise, I would place much more emphasis (and energy) on trying to make
my pre-route simulations mimick the actual layout best - proper modeling of
vias, corner cases of trace lengths, margin for worst-case cross-talk, etc.

Eventually, I think post-route simulation tools will better be able to
comprehend the actual layout and the various effects. For instance, we know
that tight serpentining will cause flight times to be reduced. I'm sure
that no post-layout tool will currently properly model this. In the future,
I hope they will. Until then, my faith in post-layout simulations will be
minimal.

Jeff Loyer
(253) 371-8093

-----Original Message-----
From: Bo [mailto:[email protected]]
Sent: Thursday, December 07, 2000 8:32 AM
To: [email protected]
Subject: [SI-LIST] : Post layout simulations: "To do or not do them and
when to do them..."

Hi Everybody,

I am facing a problem that may seem an easy one at first but not so easy
when
you think about it in more detail.
Here is a "skeleton" question surrounding the problem:
"Should I do post layout simulation of the board?"
Seems easy to answer this question, isn't it? Well here are the facts that
make this problem little bit more complicated:
Few weeks ago someone asked me for an opinion: "Should we use tool X from
company Y to do post layout simulation of our boards?" I was to already
opening my mouth to give my opinion when I abruptly stopped to think about
the
issues surrounding this question.
Here are the issues:

1) Is doing post-layout simulations waste of time? This must have been the
easiest issue I had to ask myself regarding this problem. The answer was
easily: "NO!" The hard question that followed was: "When post layout
simulations are NOT necessary? Is it when you have a lot of margin, the
layout
is not complex (e.g. the board is not well populated), etc?"

2) Why would I have to use for post layout simulations tool X when I already
did pre layout simulations with tool A? In my case I use tool A (spice
based
tool) to do most of my pre layout simulations. The greatest quality and at
the
same time greatest limitation of spice (my opinion) is that is allows a
great
level of detail when defining circuits. You can define all the little
things
in the circuit but at end you may not be able to run your simulation due to
the
complexity of the circuit you have created. Here comes in play a tool X
that
can read a layout of the board (my spice tool can't do this) and perform
simulations on the actual layout. The problem is that this (and I think
other
similar tools; I may be wrong) use IBIS models. Now my models are in spice
and
I am not an expert at converting Spice to Ibis (there is I think enough
literature around explaining how to convert Spice to Ibis). So for me to
perform simulations of this board with tool X I would have to convert my
models
from Spice to IBIS (not so easy task from my standpoint) and then perform
them.
 To make things a little worse may board layout file may be in another
format
that my tool X can't read automatically. But let assume that I can somehow
convert from one file format to another in fairly easy process (that
wouldn't
make mistakes when converting). So I am left with two solutions to perform
my
simulations:

a) Convert my spice models to Ibis and perform simulations using tool X, or
b) Extract a layout using tool X (or any other tool) to get exact layout and
then modify my pre layout spice simulations in order to reflect the real
layout
of the board.

Is a) or b) solution better? Typically tool X (by using IBIS models) will
allow way more simulations to be done in shorter amount time than my spice
tool. Yet I am not sure how does this affect accuracy of the simulations.
And
then if I am not concerned that much with accuracy of the simulations is
there
a point in doing post layout simulations? About the only thing that comes
to
mind then regarding tool X is to use this tool to verify that routing was
done
properly. Am I correct?

What is your opinion on this problem? Feel free to make any comments. I
will
appreciate any comments you might send.

Regards,
Bo

__________________________________________________
Do You Yahoo!?
Yahoo! Shopping - Thousands of Stores. Millions of Products.
http://shopping.yahoo.com/

**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected]. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****

**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected]. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:30:23 PDT