Re: [SI-LIST] : Capacitor dielectric type

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From: Ritchey Lee (leeritchey@earthlink.net)
Date: Tue Dec 05 2000 - 11:35:40 PST


Unless you have delata Is in the 10 Amp and up as occur with large, fast
processors, I agree as well.

Lee

Charles Grasso wrote:

> Somewhere in all this didn't someone agree with Dr Johnstone who I
> beliveadvises lots of cheap (i.e lossy) caps for decoupling??
>
> ----- Original Message -----
> From: Bob Weber
> To: Larry Miller ; si-list
> Sent: Tuesday, November 21, 2000 6:50 AM
> Subject: RE: [SI-LIST] : Capacitor dielectric type
> The bypass cap ESR improves damping (smoothing the
> impedance peaks & valleys) in the 50 to 250MHz range.
> The degree of improvement varies depending on capacitance
> values (bypass and plane capacitance).I select the caps
> (voltage, dielectric, and package size) to make sure I get
> enough ESR to be effective in damping. Obviously, small
> packages are good (small ESL). I avoid capacitors that
> result in a "thick stack" (i.e. a many layered MLC cap). The
> extra layers give more capacitance, reduce the L (a small
> effect), and drive down the ESR. Cap sizes that need fewer
> layers will in general have the most ESR.Using the AVX
> SpiCap software, http://www.avxcorp.com/SpiApps/spicap/ ,
> compare the ESL and ESR of a X7R cap at 1, 10, 47, and 100nF
> (100nF will have to be a 16V cap). As the capacitance goes
> down, the ESR goes up. This makes sense when you view the
> cap as a stack of smaller value layers. The total
> capacitance is increased, but the ESR is reduced. A 100nF
> X7R cap is a block, while the 1nF is a sliver. Z5U can be
> selected to give more ESR in a 100nF cap (fewer layers and
> the dielectric is more lossy).Bob W.
>
> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On Behalf
> Of Larry Miller
> Sent: Monday, November 20, 2000 11:57 AM
> To: Bob Weber; Tae-Kwang Jeon; si-list
> Subject: RE: [SI-LIST] : Capacitor dielectric type
> Interesting point. R-C "snubber" networks have
> long been used to each transient ringups in power
> transistor and SCR circuits at lower frequencies.
>
> What frequency range would you be considering this
> for?
>
> Larry Miller
>
> -----Original Message-----
> From: Bob Weber [SMTP:rweber@txc.com]
> Sent: Monday, November 20, 2000 6:11 AM
> To: Tae-Kwang Jeon; si-list
> Subject: RE: [SI-LIST] : Capacitor
> dielectric type
>
> TK,
>
> This will likely cause some discussion, but I
> avoid using NP0 or C0G
> capacitors for bypassing because of their low
> ESR. Small value (1nF) X7R
> capacitors have noticeable ESR (0.5ohm), but
> this is a good thing. It
> provides a damping element to absorb the
> ringing that develops on the
> power-ground planes due to parasitic
> resonances between the bypass
> capacitors and the unavoidable inductance of
> the connections.
>
> Bob W.
>
> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On
> Behalf Of Tae-Kwang Jeon
> Sent: Thursday, November 16, 2000 6:47 PM
> To: si-list@silab.eng.sun.com
> Subject: [SI-LIST] : Capacitor dielectric
> type
>
> Hello,
>
> I'm trying to put multiple decoupling
> capacitos on my board mixing small and
> large values in order to minimize the ESL and
> ESR.
> What I'm wondering is when I use different
> types of dielectic for the
> capacitors. For instance, I'm going to use
> 0.022uF X7R type and 470pF of
> NPO type because NPO has the lowest ESR.
>
> Does anybody know whether or not it's not a
> big deal in terms of mixed
> dielectric material for high frequency
> decoupling?
>
> Thanks,
> TK
>
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