RE: [SI-LIST] : Plane Splits Inspection

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From: abe riazi ([email protected])
Date: Thu Nov 09 2000 - 12:01:58 PST

Pat Zabinski Wrote:

You also mention the stitching capacitors. We have found them to
be useful. However, what I did not predict is the frequency
(spacing) in which you must place them. Using one test board,
we placed an ideal stitching capacitor (shorting bar) across the split,
and slid the capacitor along the split. We then injected signals
of various edge rates ranging from 35 psec to 1 nsec. Prior
to making the measurements, I predicted that there would be
a relationship between the edge rate and how far the cap could be
away from the trace. What I found was that the regardless of
edge rate, the stitching cap needed to be within 2 mm of the
trace! This was quite unexpected.


Thank you for the reply.

The separation of 250 mils between neighboring stiching capacitors (that I referred to in my post) has been recommended for use on high speed PCBs.
One draw back of this rule is that at times the high density of the board prevents utilization of that many capacitors.



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