From: Ingraham, Andrew ([email protected])
Date: Fri Nov 03 2000 - 09:06:38 PST
...
> Just to reiterate. The output buffer is CML and the output impedance I
> believe is high. The input buffer is PECL and is internally biased and
> terminated. If the output impedance of the driver is low, it makes sense
> to put the cap at the output of the driver. If not, does it make more
> sense to put the cap at the input of the receiving buffer, since the PECL
> termination is inside the receiving buffer and after the cap?
I think it makes sense to put the caps at a point where the impedance is
greater.
If the effect I am trying to avoid, is that of the 2-terminal impedance of
the capacitors not being low enough (because I am past series resonance, for
example), then putting them at a point where the impedance is high should be
good.
But I am not positive that it makes enough difference. Try some
experiments.
On the other hand, if I think the shunt capacitance to ground of the added
component pads would be a problem, I might want to avoid the high impedance
point.
If a CML output looks like a current source, then any reasonable series
impedance I insert at that point would do almost nothing to the current (and
voltage) delivered to the t-line. If I put them at the other end of the
t-line, I am between some length of low-Z line and a low-R termination and
my series impedance might drop some signal or cause mismatch. Mismatch at
the driver end doesn't matter here.
Andy
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