From: Golian, Alexander ([email protected])
Date: Fri Nov 03 2000 - 04:56:07 PST
I am designing with an optical transponder that is designed to accept
electrical signals at 2.5GB/s. The driver output is CML level, the receiver
buffer is PECL.
I have to AC couple the signal to make the voltage levels compatible. I am
getting conflicting opinions as to whether to out the cap at the output of
the driver, or at the input of the receiver.
Just to reiterate. The output buffer is CML and the output impedance I
believe is high. The input buffer is PECL and is internally biased and
terminated. If the output impedance of the driver is low, it makes sense to
put the cap at the output of the driver. If not, does it make more sense to
put the cap at the input of the receiving buffer, since the PECL termination
is inside the receiving buffer and after the cap?
Alexander J. Golian
**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected] In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:29:58 PDT