From: Kim Helliwell ([email protected])
Date: Tue Oct 31 2000 - 16:15:13 PST
Has anyone had any success in using these models? I mean the ones that are
available at:
http://developer.intel.com/design/PentiumIII/devtools/fcpga_2_01.zip
In particular, I am having trouble understanding the instructions
in the documentation for measuring the buffer delays for the AGTL buffer
model.
The instructions say: "Use the Fast/Slow/Si corner model with 50 ohm
on-die Rtt."
In the first place, there is no 50 ohm model supplied (they only supply
56, 62, 68, 72, and 110 ohm Rtt models); so apparently they expect one
to create the 50-ohm model oneself in order to make the buffer delay
measurement. This is very annoying, if it's really the intention.
In the second place, it's my understanding that the actual die does not
have an internal Rtt, so why are the models supplied as if they have an
on-die Rtt?
There are other questions, but I risk losing the audience here.
Can anyone shed light on this?
Thanks in advance.
-- Kim Helliwell Senior CAE Engineer Acuson Corporation Phone: 650 694 5030 FAX: 650 943 7260**** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
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