RE: [SI-LIST] : Decoupling caps selection

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From: Ron Miller (rmiller@Brocade.COM)
Date: Fri Oct 27 2000 - 17:32:52 PDT


Right on Tom

ATC even used to recommend that their best capacitors be stood on
edge which caused the Self resonant Frequench (SRF) to go higher in frequency.
The parallel SRF is where the impedance goes extremely high, and series SRF
is very close to it at which the impedance goes quite low but for a very narrow
frequency band.

Commonly there will be several series and parallel SRFs above the first(lower) ones,
but after passing(above) the first one all bets are off anyway.

Ron Miller

> -----Original Message-----
> From: Thomas Jackson
> Sent: Friday, October 27, 2000 4:51 PM
> To: SI List (E-mail)
> Subject: RE: [SI-LIST] : Decoupling caps selection
>
> The "Impedance vs Frequency" data that the capacitor manufacturers give is
> just that. It shows at what frequencies their parts cease being capacitive
> and start becoming inductive. Note that for most common electrolytic
> capacitors, that is in the ones to tens of MHz range even though current
> clock rates go into the 100s of MHz and frequency content of the edge rates
> go into the GHz.
>
> This is why short-wide capacitor packages like 0508 are more desirable than
> the common narrow-tall packages like 0805. The short-wide capacitors stay
> capacitive up to about twice the frequency as the comparable narrow-tall
> equivalent.
>
> The idea is to minimize inductance over the frequencies of interest (up to
> the edge rate "knee" frequency). One can also minimize the inductance by
> minimizing the current loop area from the power plane to the capacitor and
> back to the ground plane. Again, one can get about a factor of 2
> improvement by the correct layout.
>
> Edge rates are, primarily, functions of the devices being used. While the
> semiconductor manufacturers, generally, don't want to add it to their specs
> and, therefore, test for it, general edge rate information is available in
> the SI literature for common logic families and it is buried in device IBIS
> models such that simulators can use it. I have not had any luck calculating
> edge rates from IBIS models by hand.
>
> I hope this helps.
>
> Thomas L. Jackson, P.E.
> Staff Product Development Engineer
> Network Access Development
> Systems Solutions Group
> FUJITSU MICROELECTRONICS, INC.
> 3545 North First Street
> San Jose, CA 95134-1804
> telephone: (408) 922-9574
> facsimile: (408) 922-9618
> http://www.fujitsumicro.com
>
>
> -----Original Message-----
> From: Dilpreet Saini [mailto:DSAINI@altera.com]
> Sent: Friday, October 27, 2000 3:15 PM
> To: SI List (E-mail)
> Subject: [SI-LIST] : Decoupling caps selection
>
>
> Hi all,
> I was wondering if the selection of the decoupling capacitor of a
> circuit is MAINLY governed by the edge rates of the switching signals or by
> the frequency of their switching. I believe the answer is later cause all
> the documentation that I have seen on the dcoupling cap selection so far do
> not have any mention of the edge rates. Most of the capacitor manufacturer
> have "Impedance Vs Frequency" charts in their specs/catalogs. I am assuming
> that the Frequency that they are referring to is the frequency of operation
> of the circuit. Any ideas/comments are greatly appreciated.
>
> Dilpreet
>
>
>
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