[SI-LIST] : Via Modeling

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From: Paglia, Frank M (frank.m.paglia@intel.com)
Date: Thu Oct 12 2000 - 16:46:47 PDT


Hello all,
I am new to the SI field and I have some questions about the modeling of
vias. Can any one point me to the equations for effective characteristic
impedance for buried, blind, and micro vias. I have looked in the Johnson's
Black Magic book and in High-Speed Digital System Design by Hall. Johnson
gives the following:

C = 1.41*Er*T*D1 pF, L= 5.08*h[ ln(4*h/d)+1] nH
          D2-D1

Where D2 is diameter of the hole in ground planes, D1 is diameter of the
pad, T is thickness of the board, Er is the dielectric constant, h is the
length of the via, and d is the via diameter.
Hall quotes Johnson's equations for capacitance and inductance, but these
are for through vias. In Hall's book through via model is given as a pi
network with one cap in each leg for the capacitance of the pad coming in
and out, then an inductor across for the barrel's inductive effects. The
question is this; How is the total capacitance, which both Hall and Johnson
Cvia, related to the capacitance for each pad? Shouldn't T in the eq. for
Cvia change depending on which layers the pad is on and not just the total
thickness of the board? And for inductance, shouldn't h be the distance
between the pads? Wouldn't L be different say for a via with pads on layers
1 and 6, than on layers 1 and 4? Any help would be greatly appreciated.
Thanks.
________________________
Frank M. Paglia
Intel Corporation

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