RE: [SI-LIST] : EMI due to fans (fwd)

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From: Ken Cantrell (Ken.Cantrell@srccomp.com)
Date: Thu Oct 12 2000 - 08:57:59 PDT


Sunil,
I think that the fan is probably not the dominant effect since the frequency
is too low. However, how the fan is grounded could be an issue,i.e.,
injecting additional common mode currents into the power frame. The fan
exacerbates the problem, but is not the root cause. The same could be said
for the rest of your system. It sounds like you have a general grounding
problem since your system is hypersensitive. This type of problem tends to
be mechanical in nature from a board-to-chassis perspective, and geometric
from a board perspective, not enough surface area for a low inductance
ground path, typically at board connectors. Fix that first, and the
majority of your issues should dissappear.
Ken

-----Original Message-----
From: owner-si-list@silab.eng.sun.com
[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Sunil Kumar
Sent: Thursday, October 12, 2000 12:42 AM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : EMI due to fans (fwd)

Hello everybody.

I am measuring cycle-to-cycle jitter in clock in a system, where clock
(PECL, 50MHz) is going from one PCB (card) to other through twinax
cable. In the second card clock is converted into TTL and then distributed
to various ICs. I am looking at the clock just before the PECL-to-TTL
convertor. Both the cards are in the same backplane. The system is
equiped with a set of fans for cooling, which are kept below the card
frame. Now what I have observed is, when the fans are not on, jitter is
much much less in comparision of the jitter when fans are on. I think, the
fans are generating EMI, which is disturbing the planes in the backplane
and the cards, and hence jitter is increased. Any explanations?

One more thing which I have observed is, the PECL-to-PECL clock
fanout buffer (no PLL inside) is reducing jiiter (with fans off), i.e.
jitter at input is more than that at output. Can anybody explain this?

Is there any PECL-to-TTL clock fanout buffer which adds very low
jitter? The PECL-to-TTL buffer which I am using, is adding lot's of
jitter.

Thanks

Sunil Kumar
Senior Research Engineer
ATM Group
C-DOT
Bangalore-560052
INDIA

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