RE: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS

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From: Ken Cantrell (Ken.Cantrell@srccomp.com)
Date: Thu Oct 05 2000 - 12:29:18 PDT


Heiko,
To be clearer, by "come from", I did not mean causal. I assumed that
standard SI techniques had been employed, one of which is correct power
plane bypassing. There is however an inherent Vcm introduced when one
"chassis" (product) is connected to another "chassis" (cable). The near end
of the cable "chassis" then mates to its far end cable "chassis" with some
length (inductance/length) proportional Vcm. Which in turn mates to the far
end product "chassis". Any cabled connection has 3 Vcm's that have to be
accounted for. In addition to correct power plane bypassing, correct local
component bypassing, correct local I/O bypassing (and bridging), and correct
AC-I/O chassis grounding must be employed. Even given all of this there
will always be a voltage difference between the two system grounds unless
they occupy the same space. The effects can be made as small as physically
and economically feasible, but not eliminated. Experientially, I have found
that the last emissions/susceptibility problem solved usually involves the
electrically simplest part of the system, which I always find ironic. That
is what I was alluding to. Usually increasing the mating surface area,
after some noise reduction with a common mode ferrite correctly placed with
regard to lambda/2 and lambda/4 resonances, does the trick.

Method of Moments is the grandaddy of computational electromagnetics. One
of it's drawbacks is that it is a frequency domain technique, unless you are
using a hybrid technique. Frequency domain algorithms have to be iterated
over the frequencies of interest, which is time intensive. Hybrid
time-domain MoM implementations are equally or more time/RAM intensive. The
second drawback is that MoM is a surface-based method instead of a
volume-based method. It's an antenna thing, a perfectly conducting wire
scattering algorithm without the presence of EM penetrable bodies like FR-4,
and non-conductive segments of board components. It's similar to the
lossless vs lossy transmission line modeling. Can't get there from here.
The higher the frequency the more dominant these issues become. The third
problem is, quote: "while not taking anything else into account than the PCB
itself." You are saying that you are not able to model the unterminated
connector pins as monopole, lambda/4 resonant, antennas, much less the
cabling. They DO have an effect. I reviewed your package less than a year
ago, and the pin/connector modeling included the ability to put in RLC
values for a user defined model. I was unable to get information on how, or
if, this data was processed by your MoM engine. Perhaps you could give me a
name. In either case, the modeling capability was new to your software, not
new to some of your competitors, and an improvement, but not an answer to
modeling pins/connectors/chassis.
I am aware of Cadence's recent entry into power frame analysis tools. I
think it was in beta at the time of my review, so I didn't get the chance to
exercise it. Glad you are catching up to Innoveda. Hope it's easier to
use. I am very interested in trying it out since I am sure it has a rich,
system integrated, feature set which is a Cadence hallmark.
Ken
-----Original Message-----
From: Heiko Dudek [mailto:heikod@cadence.com]
Sent: Wednesday, October 04, 2000 4:22 PM
To: Ken Cantrell; Jim Freeman; Donald Telian
Cc: May, John; si-list@silab.eng.sun.com
Subject: RE: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS

Ken,

I slightly disagree ... let me explain.

The differentiation between common and differential mode emissions has a
very practical
background: the radiation from PCB structures can be categorized into
differential mode
and common mode emitters (I think this was first introduced by W. L. Weeks
in “Electro-
magnetic Theory for Engineering Applications”, Wiley, 1964). A current loop
'antenna'
would be an emitter for differential mode emissions and a dipole or point
source 'antenna'
would be a common mode emitter. Differential mode emissions are relatively
easy to handle
even as a pre-layout estimation (SPECCTRAQuest SigXp can do this for you),
since the
loop area (formed by the signal path - the trace - and the return path -
somewhere on the
reference plane(s)) - as well as frequency and loop current (signal current,
calculated in a
standard SI simulation) can be determined. Dipole emitters (e.g. the voltage
drop along a
return current path on reference plane structure building dipoles at the
edges of a cut-out
or similar things happening in peripheral (conducting components around the
PCB) are
way more complicated to model. SPECCTRAQuest uses a 'method of moments'
approach
to calculate (both differential and common mode) emissions (you can actually
get the near-
field results as well as the far-field emissions) - while not taking
anything else into account
than the PCB itself.
And here's where I disagree. Cables are not the origin for common mode
emissions, they are
just the emitters (the 'antennas' for TEM waves between reference planes,
exited by point
source antennas - large switching currents through vias connecting pwr / gnd
to decaps /
comps - if you like). So the real evil to fight is SSN - or, in other words,
get your power supply
decoupled correctly. For this purpose we recently announced SQ Power Plane
Designer,
it's a DESIGN approach (vs post-layout verification) to get decoupling
right.

  - Heiko

At 10:19 AM 10/3/00 -0600, Ken Cantrell wrote:
>Donald,
>Correct me if I'm wrong (Jim), but SQuest, or any of the other vendors
other
>than Innoveda(Quiet Ext), only do a differential mode emissions analysis.
>This means that you are not able to analyze the Vcm created between the
>board and the cable(s), where most of your emissions issues come from.
>Don't get me wrong, I'm not pro-Innoveda either, I'm just a user. There
are
>issues with all of the packages. Innoveda XTK is antiquated and hard to
>use, plus you have to buy XTK to support Quiet and AC/Grade. They should
>have an XTK lite so that the user has a choice, or make Quiet and AC/Grade
>stand alone. SQuest, HyperLynx, and ICX are more user friendly, but don't
>do common mode. HyperLynx (PADS and Innoveda merged, so HyperLynx is under
>the Innoveda banner now), deserves special note. If you are not designing
>chips, just doing boards, it is the most user friendly and intuitive tool
>out there, and it will do 90% of what you need to do at about 10% of the
>cost. If you are in a multiple product line, manufacturing driven
>situation, and are using Cadence, SQuest has a lot of elements that will
>make your life easier. They make the most highly integrated (with CAD,
Mfg,
>and design)package. I also like the agressive pricing that Cadence started
>about a year ago. They give you a lot of bang for the buck. I haven't had
>the chance to review Mentor ICX yet, hopefully later this month. I've had
>problems just getting the package in, both in Seattle and Springs. They
>seem to be responsive on the phone or e-mail, but there is a disconnect
>there somewhere. I have reviewed their FPGA sim pak, Advantage, and it is
>very good. Detailed, but easy to use. I'm hoping their SI pak is as good.
>User to user, Donald, the EDA industry is extremely competitive right now.
>Each vendor leap-frogs the other just about every couple of months on
>feature sets. I used to go for getting everything from one vendor, but now
>I'm mixing and matching, typically doing the one year lease instead of the
>lifetime buy.
>Ken
>Sim Manager
>SRC Computers
>
>-----Original Message-----
>From: owner-si-list@silab.eng.sun.com
>[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Jim Freeman
>Sent: Monday, October 02, 2000 7:53 PM
>To: Donald Telian
>Cc: May, John; 'si-list@silab.eng.sun.com'
>Subject: Re: [SI-LIST] : FW: Spectraquest Vs. XTK/XNS
>
>
>
>The problem is that the Hspice models are using the M format.
>
>Jim Freeman
>
>
>Donald Telian wrote:
>
> > John,
> >
> > Answers for SPECCTRAQuest are below.
> >
> > Thanks for asking,
> > Donald T.
> > CADENCE
> >
> > At 01:48 PM 9/25/00 -0400, May, John wrote:
> > >
> > >
> > >> -----Original Message-----
> > >> From: May, John
> > >> Sent: Monday, September 25, 2000 1:20 PM
> > >> To: 'si-list@silba.eng.sun.com'
> > >> Subject: Spectraquest Vs. XTK/XNS
> > >>
> > >> Hi all - My group is looking into purchasing one of these tool suites
>for
> > >> SI analysis. I'm wondering what the tradeoffs and limitations of each
>are.
> > >> For instance:
> > >>
> > >> 1) Can botth suites handle HSPICE models in a mixed environment with
>IBIS
> > >> models?
> > >>
> >
> > SPECCTRAQuest uses an optimized spice engine for analysis. As such, all
> > types of spice models can be used with the exception of transistor-based
> > models (M elements). Naturally, IBIS models can be used as well. If
you
> > want to use both IBIS and transistor-level IO models, we have a netlist
> > converter that will translate our proprietary spice netlist (extracted
>from
> > PCB layouts or topology drawings) into a variety of other spice formats.
> >
> > >> 2) Do either of the tools have trouble with differential inputs(high
>and
> > >> low inputs used with a differential receiver)?
> > >>
> >
> > SPECCTRAQuest has support for differential drivers and receivers.
> >
> > >> 3) Connector stitching: How easy is it to use these tools for going
> > >> through connectors to model paths that traverse multiple modules?
> > >>
> >
> > It is quite simple to join multiple board layout files together in
> > SPECCTRAQuest for simulation. And that includes package layout (.mcm)
> > files as well. A variety of connector or cable models can be easily
>placed
> > between the boards. The simplest being RLC or RLGC representations, but
> > fully-coupled connector models can also be integrated into the
simulation.
> > This normally requires some re-formatting of the data from the connector
> > vendor, but it is not too hard to do assuming you understand how to
build
> > and call spice subcircuits.
> >
> > >> John
> > >
> > >**** To unsubscribe from si-list or si-list-digest: send e-mail to
> > >majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
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> > >****
> > >
> > >
> > >
> > Donald Telian
> > Cadence Design Systems
> > phone: 408-944-7791
> > donaldt@cadence.com
> >
> > **** To unsubscribe from si-list or si-list-digest: send e-mail to
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>
>
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>
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     Heiko Dudek
     Technical Marketing Manager | High Speed Systems Design & IC Packaging
     Cadence Design Systems | 270 Billerica Road | Chelmsford, MA 01824

     ph: (978) 262-6384
     fx: (978) 446-6798
     email: heikod@cadence.com

**** To unsubscribe from si-list or si-list-digest: send e-mail to
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