[SI-LIST] : Stackup question

About this list Date view Thread view Subject view Author view

From: Brad Crowell ([email protected])
Date: Tue Sep 05 2000 - 07:24:42 PDT


I am designing a conduction cooled board and have some questions regarding
the best stackup to use. The central layers must included thermal planes
which are connected to chassis ground by the heat ladder. I would like to
keep my power ground next to the power plane for best decoupling effects.
Thus, if I used the following stackup, how would I determine the impedances
of the stripline signal layers since chassis ground is not the return plane?
Can I ignore the thermal planes and calculate the impedance as if the planes
were not present, ie assume only dieletric? How much error would be expected
in such a calculation? What would be the effect on impedance of the chassis
grounded thermal planes in the stackup?

top
3.3V
gnd
signal 1
signal 2
thermal
thermal
signal 3
signal 4
gnd
5V
bottom

Thanks for your consideration,
Brad
***************************************
Brad Crowell
Hardware Designer
AMIRIX Systems
77 Chain Lake Drive
Halifax, Nova Scotia, B3S 1E1
Tel: (902) 450-1700 ext#287
Fax: (902) 450-1704
Email: [email protected]
Web: http://www.amirix.com
***************************************

**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected]. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue May 08 2001 - 14:29:26 PDT