[SI-LIST] : SI Career Opportunity @Tessera, San Jose, CA

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From: Brian Seol (BSeol@tessera.com)
Date: Mon Aug 28 2000 - 13:51:52 PDT


Tessera, headquarted in San Jose, CA, is looking for talented, motivated and
committed SI engieers to do electrical modeling, simulation, and design of
advanced packages for high speed devices. This job requires an individual
with outstanding electrical simulation and performance characterization
skills who is able to perform detailed electrical analysis on high
performance advanced packages for the semiconductor industry. Must be
willing to work in aggressive growth environment as part of leading edge
electronic package development team.

About Tessera:

Founded in 1990, Tessera is the world's leading provider and licensor of
Chip Scale Packaging (CSP) technology, enabling the semiconductor industry
to deliver standardized next-generation integrated circuits optimized for
performance, reliability, size and cost. The company's flagship Micro BGA
package, has been adopted as the de facto standard for a range of memory
architectures, with more than 250 companies supporting the package with a
broad infrastructure of materials, equipment and test solutions. Tessera, a
privately held company, licenses its technology to over 30 assembly and
semiconductor companies, including industry leaders such as Amkor, AMD,
Hitachi, Hyundai, Infineon, Intel, LG, Samsung, and ST Microelectronics.
For more information, please visit the company's web site at
http://www.tessera.com

Critical Experience:

Must be experienced in electrical modeling and analysis of electronic
packages using electromagnetic field solvers such as Ansoft Maxwell and TPA.
Experience with IBIS and/or SPICE modeling highly desirable. Familiarity
with electromagnetics theory, circuit simulation, and characterization
techniques using VNA and/or TDR are also desired. Experience in RF
engineering, designing for EMI reduction and system performance simulation
is preferred.

Responsibilities:

Extract and analyze the electrical parasitics of advanced packages given
AutoCAD generated CAD files. Perform detailed analysis and characterization
of high speed package electrical behavior. Create device-level
specifications and provide package design guidelines for optimizing
electrical performance of the packages. Design, build, and characterize
prototype packages. Also responsible to work with leading semiconductor
companies to answer their electrical concerns regarding the advanced
packages being developed. Make presentation to customers and team members
on modeling, simulation, and characterization results.

Qualifications:

BSEE is required. MSEE/PhD desired. Good writing skills and public
communication/customer interaction skills also required. Both experienced
candidates and recent graduates will be considered.

If you are interested in this position, please email your resume to:

Brian Seol : bseol@tessera.com

or

Young Kim : ykim@tessera.com

Thanks and regards,

Brian

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