RE: [SI-LIST] : Board Data Needed

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From: Lynne Green (lgreen@mail.hyperlynx.com)
Date: Thu Aug 24 2000 - 10:53:38 PDT


Hello, Mike,

Aggressive designs are 2-4 mil lines/spaces. MCMs can
go finer than that. Back in the 70's, I did 1 mil lines/spaces
on MCMs (then known as hybrids).

You can get current information from the high-speed board
houses. This is especially important, because C & G
depend on the cure cycle as well as the starting materials.

You can download the free HyperLynx demo. LineSim
(pre-layout) analysis calculates Z0 and RLC from the stackup
dimensions (metal width & height, dielectric thickness and
eps_r, metal resistance) using the Stackup Editor.
http://www.hyperlynx.com

- Lynne

-----Original Message-----
From: owner-si-list@silab.eng.sun.com
[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Michael Lamson
Sent: Thursday, August 24, 2000 7:43 AM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : Board Data Needed

Hi folks. I would like to get some typical numbers for PC board RLCG
parameters. I am coming from the packaging side and I'm not familiar with
the latest board technologies. I can generate these numbers myself if you
have typical line width/spacing/thickness geometries, dielectric properties
(epsilon and loss tan) and dimensions. Any info will be appreciated.

Best regards,

Mike Lamson
TI
m-lamson@ti.com

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