From: Ken Willis ([email protected])
Date: Thu Aug 24 2000 - 10:22:56 PDT
Hi Aloke,
Today, you can't extract coupled-line circuits into Sigxp. You
can build coupled-line topologies interactively in Sigxp and
simulate them, or simulate coupled-line stuff to your heart's
content at the board lavel, but today you can only extract
single-line topologies directly from Allegro into Sigxp. The
reason for this is that, besides being complicated (try to come
up with an algorithm to auto-place all those symbols in the Sigxp
canvas legibly!), for a given geometry window you may end up with
an enormous coupled circuit. It isn't uncommon to drag
20 neighbor nets into a crosstalk simulation. While this is routinely
done at the board-level simulation with SPECCTRAQuest, extraction
of coupled stuff into Sigxp as topologies won't be supported until
some kind of intelligent pruining algorithms are written, for example
to just extract the 2 diff pair nets into Sigxp and nothing else. I
know this was being kicked around a couple of months back, but don't know
the status.
The way I do it today is two-fold:
- mock up your diff pairs interactively in Sigxp and
figure out your wiring rules
- simulate the diff pairs at the board level post-route
and look at the skews, waveforms, and eye patterns
It works pretty well, I've gotten good correlation with lab
measurement well up over 600 MHz for diff pairs.
Ken Willis
Sirocco Systems
-----Original Message-----
From: Aloke Bhattacharya [mailto:[email protected]]
Sent: Thursday, August 24, 2000 12:31 PM
To: [email protected]
Subject: [SI-LIST] : simulating differential pairs in Specctraquest
Hello,
I am facing a problem with simulation of differencial pairs in
Specctraquest. When I try to extract the topology of a net which is
defined as part of a differential pair, Sigxp gives error saying
"differential pair extraction is currently not supported". Does anybody
know how to simulate a differential pair
in Specctraquest?
Thanks in advance,
With regards,
Aloke
-- ********************************************************************** * Aloke Bhattacharya, * * Senior Engineer-VLSI/System Design, * * * Wipro Infotech, * * Global R&D, * * 88, M.G. Road, 5th Floor, * * S.B. Towers, * * Bangalore- 560 001 , * * INDIA * * Tel : 91-80-5588422(Ext. 520) * * email: [email protected] * * ************************************************************************** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****
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