From: Charles Grasso (firstname.lastname@example.org)
Date: Fri Aug 11 2000 - 11:27:52 PDT
Ansofts HFSS version 8 translates modes to nodes , in other words you can
a fully coulped SPICE model of the device of interest to a very high
----- Original Message -----
From: Ray Anderson <email@example.com>
Sent: Tuesday, August 08, 2000 9:09 PM
Subject: Re: [SI-LIST] : Tools for high-speed interconnect design
> As you pointed out, digital designers like to see time domain waveforms
> as the result of their simulations. A time domain simulator (a spice
> variant, XTK, HP ADS or other time domain solve engine) is commonly
> utilized. Inserting accurate models of discontinuities into such
> can sometimes be a challenging problem.
> There are a number of ways such models can be developed:
> Frequency Domain Methods:
> From field solvers or from frequency domain lab measurements s-parameters
> be determined. As you mentioned, by means of optimization, a lumped (or
> distributed) topology can be fit to the synthesized or measured data to
> a discontinuity model that can be quite accurate over some defined
> Alternatively, the same s-parameter data can be mathematically manipulated
> (extract poles and zeroes) to form a rational function (i.e. a ratio of
> polynomials). Pade' functions are one common example. The derived
> function can be implemented in a spice simulation as polynomial
> A third method is to directly mathematically extract circuit element
> values from measured or simulated s-parameter data. The derived circuit
> elements (usually R's, L's, and C's) can then be used in a spice
> One "gotcha" of the frequency domain methods utilizing measured
> characterization data is that some sort of de-embedding must be performed
> try and separate the desired discontinuity data from the undesired
> data. Sometimes a non-trivial exercise.
> Time Domain Methods:
> Methods exist to utilize time-domain (TDR and TDT) data that is measured
> the lab to create models that are suitable for time domain simulations.
> A nice thing about the time-domain methods is that you can take advantage
> of time windowing to extract the data relevant to the discontinuity of
> interest and to ignore responses caused by fixturing.
> TDR and TDT measurements allow one to extract parasitics, equivalent
> circuits, impedance and delay, frequency dependent Zo, and s-parameters.
> Methods that may be employed include: Model optimization, Peeling
> time domain network analysis, and rational functions.
> The model optimization method is somewhat similar to the freq. domain
> optimization method except one optimizes element values in a time domain
> simulation instead of a freq. domain simulation.
> The peeling algorithm is implemented in the Tektronix IPA-310 and 510
> systems, the tool offered by TDA systems as well as Agilent (HP).
> Time domain network analysis is a mathematical method currently
> under development.
> The rational function method is a time-domain adaption of the frequency
> method of the same name.
> I won't get into any of the details here. (it can get quite involved),
> my colleague Madhavan Swaminathan of the Packaging Research Center at
> Tech and his students have done extensive work on both time domain and
> frequency methods of modeling and have published much of the work and have
> several new upcoming pubs in queue on the subject.
> There are many variants on the methods I've outlined, and I'm sure many
> other methods I haven't mentioned here. The point is, once you have either
> measured or synthesized characterization data for a discontinuity, there
> exist numerous methods for introducing the data into a time domain
> spice (or spice-like) simulations. Each method has it's pros and cons.
> Depending on exactly what you are doing some methods may be preferred
> over others.
> -Ray Anderson
> Sun Microsystems
> > Hello, everyone:
> > This topic has been brought up several times but I still want to have
> > some idea from you as to what tools you use and when you use them.
> > For digital designers, one of the major concern is the waveform they get
> > at the devices pins. Such job is most efficiently done using traditional
> > tools like HSPICE, XTK, etc., which can handle the active device models
> > with non-linear characteristics.
> > However, when the speed of signal get faster and faster, the
> > discontinueties such as vias has to modelled properly. To get this
> > done, full wave field solver such as Ansoft HFSS, which was
> > traditionally aimed for RF/microwave/antenna design may have to be used.
> > But the problem with field solver is that they usually does not support
> > active device models (correct me if I'm wrong). My question is, how do
> > you guys utilize results from field solver in your circuit simulation ?
> > As far as I know, one approach is to build an equivalent circuit for the
> > interconnect under study, optimize the RLC values so that the S
> > parameters from the equivalent circuit match that of the HFSS
> > simulation. Is this approach the common one used by SI engineers ? Any
> > other approachs that you use and the tools you used ? Please share with
> > me your experience.
> > Thanks in advance.
> > Perry
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