From: Laurence Michaels ([email protected])
Date: Thu Jul 06 2000 - 12:26:18 PDT
"Ingraham, Andrew" wrote:
[attribution missing in original] "Mark Nass" wrote:
> > What is the best load for the VT waveform section of an IBIS model for a
> >type buffer?
> The best load is one that approximates the actual load seen by the buffer
> for the first few nanoseconds after it switches.
> > Or doesn't make a difference.
> Yes, it can. The less the actual load looks like the test load, the more
> the simulator needs to extrapolate.
> The resistance should be similar to the typical trace characteristic
> impedance. But if the buffer always drives the middle of a bus, or a line
> which has terminations on both ends, then half the characteristic impedance
> is more appropriate.
> For full rail-to-rail switching, the trace being driven would be near 0V
> (with no current) before switching high, and near Vdd (with no current)
> before switching low, so the output buffer sees an effective load of Zo to
> either Gnd or Vdd initially. But if there is DC termination, or if the
> switching rate is fast enough that signals never approach full amplitude,
> then a different test load may be appropriate.
> You want to have the buffer see the same voltage and current while it
> switches, that it would in the real circuit.
Another consideration: Some simulation programs have specific loading
requirements for VT waveforms in IBIS files. Check the documentation,
a local support person, or the customer who asked for the IBIS files
for more information. There are few limits on the number of VT
waveforms that can be included in an IBIS file, so there's no need to
limit yourself to just one or two loads. Most sim programs will ignore
those extra waveforms, and your customer may have a program that can
use the additional waveforms.
-- Laurence Michaels No spam, please.
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