From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Thu Jul 06 2000 - 10:03:30 PDT
> What is the best load for the VT waveform section of an IBIS model for a
The best load is one that approximates the actual load seen by the buffer
for the first few nanoseconds after it switches.
> Or doesn't make a difference.
Yes, it can. The less the actual load looks like the test load, the more
the simulator needs to extrapolate.
The resistance should be similar to the typical trace characteristic
impedance. But if the buffer always drives the middle of a bus, or a line
which has terminations on both ends, then half the characteristic impedance
is more appropriate.
For full rail-to-rail switching, the trace being driven would be near 0V
(with no current) before switching high, and near Vdd (with no current)
before switching low, so the output buffer sees an effective load of Zo to
either Gnd or Vdd initially. But if there is DC termination, or if the
switching rate is fast enough that signals never approach full amplitude,
then a different test load may be appropriate.
You want to have the buffer see the same voltage and current while it
switches, that it would in the real circuit.
firstname.lastname@example.org. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Wed Nov 22 2000 - 10:50:45 PST