**From:** Daniel, Erik S. (*Daniel.Erik@mayo.edu*)

**Date:** Wed Jun 14 2000 - 11:34:54 PDT

**Next message:**Bradley S Henson: "[SI-LIST] : FC Connector Crosstalk"**Previous message:**Toby Bauter: "RE: [SI-LIST] : wire bond vs flip chip?"**Maybe in reply to:**Barry Ma: "[SI-LIST] : Upper limit of interplane capacitance"**Next in thread:**Larry Smith: "RE: [SI-LIST] : Upper limit of interplane capacitance"

Larry-

I agree with most of your comments on power plane capacitance, but I have to

disagree with one point -- dielectric loss does NOT decrease with decreased

thickness of the dielectric -- dielectric loss is independent of the

dielectric thickness in particular, and all geometrical concerns in general

(unlike skin-effect loss).

You point out that

alpha = R/2*Z0 + G*Z0/2

G = tan(delta)*omega*C

arguing that, G~C, Z0~1/sqrt(C) , so G*Z0/2 ~ sqrt(C), so reducing the

dielectric thickness increases C which increases G*Z0/2 and hence alpha.

All true except for the very last part of the statement. Reducing the

dielectric thickness also decreases L and Z0~sqrt(L). It turns out that

this cancels the contribution from the sqrt(C) factor.

To see this more clearly, I prefer to write G as follows:

G = tan(delta)*omega / (prop velocity * Z0)

^^^^^^^^^^^^^^^^^^^^

= 1/C

= tan(delta)*omega*sqrt(e)/(c*Z0)

where e is the dielectric constant (real part), c is the speed of light in

vacuum, Z0 is the characteristic impedance. Using this expression, it is

clear that G*Z0 is independent of geometry. Yes, this treatment is a bit

suspect because it relies on transmission line notation when really

referring to power planes, but I maintain that dielectric loss is generally

geometry independent, unlike skin-effect loss in the surrounding conductors.

- Erik

==================================================================

Erik Daniel, Ph.D. Mayo Foundation

Voice: (507) 284-1634 Guggenheim 1011B

Fax: (507) 284-9171 200 First Street SW

E-mail: daniel.erik@mayo.edu Rochester, MN 55905

==================================================================

*> -----Original Message-----
*

*> From: Larry Smith [mailto:Larry.Smith@Eng.Sun.COM]
*

*> Sent: Wednesday, June 14, 2000 12:39 PM
*

*> To: si-list@silab.eng.sun.com
*

*> Subject: RE: [SI-LIST] : Upper limit of interplane capacitance
*

*>
*

*>
*

*> Dr. Johnson
*

*>
*

*> I am glad that we completely agree on the necessity of thin dielectric
*

*> between power planes!
*

*>
*

*> But, let's further consider the role of the dielectric constant. I
*

*> don't want to discourage all the folks out there who are developing
*

*> high K materials for pcb power planes. It is true that there are some
*

*> time of flight issues as we raise the dielectric constant, but I don't
*

*> think they are major.
*

*>
*

*> We have just about reached the "thinness" limit with FR4 woven glass
*

*> and resin with the 2 mil Hadco BC technology. I agree that we can
*

*> connect pairs of power planes in parallel to achieve higher
*

*> capacitance, lower inductance and lower impedance power distribution,
*

*> but there is a better way. It will require a new, thinner material
*

*> between the power planes.
*

*>
*

*> You have asked for someone to develop materials with higher loss to
*

*> deal with plane resonances. I believe the best material for that is a
*

*> thin dielectric. Several suppliers have demonstrated the ability to
*

*> build 1 mil thick dielectric cores with copper planes attached to each
*

*> side. At least one suplier has a road map showing dielectric
*

*> thickness
*

*> at a fraction of a mil. They are working hard to make these
*

*> technologies consistent with PCB manufacture. The cores would simply
*

*> be inserted into the stackup like an FR4 core.
*

*>
*

*> So, how does thin dielectric increase the loss? For low loss
*

*> transmission
*

*> lines, the lossy propagation constant alpha = R/2*Z0 + G*Z0/2. R is
*

*> the conductor resistance, G is the dielectric loss
*

*> (tan(delta)*omega*C), Z0 is the impedance of the transmission line.
*

*> The power planes are well represented an xy array of transmission
*

*> lines. At the frequencies that we are concerned with (1 MHz
*

*> to 5 GHz),
*

*> R and G are dominated by skin loss and dielectric loss. R goes as
*

*> sqrt(freq). G is proportional frequency and C. As we reduce
*

*> the dielectric thickness, the skin losses remain the same but the
*

*> impedance of the transmission line and goes down, thus increasing the
*

*> first term in alpha. Z0 is in the numerator of the second term so it
*

*> might appear that alpha is going to increase as we reduce thickness.
*

*> But G goes as C and Z0 goes as 1/sqrt(C), so the second term of alpha
*

*> also increases with decreasing dielectric thickness. Thin dielectric
*

*> power planes increase the loss of the power planes, a very fortunate
*

*> result!
*

*>
*

*> Attached is a (hopefully small) .pdf file that shows the simulation of
*

*> power plane impedance vs frequency for several dielectric thicknesses.
*

*> One AC amp is forced along the edge of our familiar 6x6 square inch
*

*> pair of power planes. You can see the Capacitive down slope (-20 dB
*

*> per decade) at low frequencies and can see where the plane resonances
*

*> begin above 100 MHz. Skin effect and dielectric loss has been
*

*> included in these simulations. Notice how the plane resonances damp
*

*> out nicely as we simulate 1, 0.5, 0.25 and 0.1 mil thick dielectrics.
*

*>
*

*> A second panel is in the simulation that shows the effect of raising
*

*> the dielectric constant between planes from 4 to 16. Notice how the
*

*> impedance of every curve has dropped. Also notice how the damping has
*

*> been increased for each dielectric thickness. This is because the
*

*> impedance of the planes go as sqrt(L/C) and the dielectric
*

*> constant has
*

*> increased C. A reduction in plane impedance has increased
*

*> the alpha of
*

*> the propagation constant and reduced the magnitude of the cavity
*

*> resonances.
*

*>
*

*> The first priority is to reduce the dielectric thickness because that
*

*> reduces L as well as increases C. But if we happen to get a high
*

*> dielectric constant in that thin material, I will definitely take it!
*

*>
*

*> best regards,
*

*> Larry Smith
*

*> Sun Microsystems
*

*>
*

*> > X-Sender: howiej@mail.methow.com
*

*> > Date: Tue, 13 Jun 2000 15:34:26 -0700
*

*> >
*

*> > I advocate thin dielectric layers, using ordinary FR-4
*

*> > dielectric materials. I don't like using high-dielectric
*

*> > materials for power-and-ground plane separation.
*

*> >
*

*> > As we go to higher frequencies, in order to attain ever-lower values
*

*> > of spreading inductance, we will need thinner and thinner
*

*> power-ground
*

*> > spacing. If we cannot make our power-ground
*

*> > dielectric layers sufficiently thin, we may have to switch to
*

*> > a layer-cake approach with several pairs of power-ground layers.
*

*> >
*

*> > To deal with our resonance problems, I'm hoping that someone
*

*> > will develop some materials with somewhat higher loss
*

*> > properties that FR-4 and copper. Either a more lossy dielectric,
*

*> > or perhaps a copper layer with a surface treatment that
*

*> > increases its skin-effect loss (like plating with tin or
*

*> > something less conductive that copper) could begin to help
*

*> > in this area.
*

*> .
*

*> .
*

*> .
*

*> >
*

*> > Best regards,
*

*> > Dr. Howard Johnson
*

*> >
*

*>
*

*>
*

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**Next message:**Bradley S Henson: "[SI-LIST] : FC Connector Crosstalk"**Previous message:**Toby Bauter: "RE: [SI-LIST] : wire bond vs flip chip?"**Maybe in reply to:**Barry Ma: "[SI-LIST] : Upper limit of interplane capacitance"**Next in thread:**Larry Smith: "RE: [SI-LIST] : Upper limit of interplane capacitance"

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