RE: [SI-LIST] : Upper limit of interplane capacitance

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From: Barry Ma (barry_ma@altavista.com)
Date: Fri Jun 09 2000 - 08:56:20 PDT


Larry,

Yes, you are right. Many people investigate their PCB by using Vector Network Analyzer (VNA) with two cables. In the article you forwarded, Howard Johnson suggested using VNA in Time Domain to take place of TDR (Time Domain Reflector). Todd Hubing et al used VNA, too, in their paper "An Experimental Investigation of 4-layer PCB Decoupling", EMC Symposium 1995, pp. 308-312.

In our case measuring the frequency response of pwr/gnd planes of PCB, we would like also to use VNA. What I suggested is to measure S11 with VNA by soldering a probe cable directly to two very closed Vcc and Gnd bonding pads on the PCB. (see the Figure in EDN magazine:
http://www.ednmag.com/ednmag/reg/2000/03302000/pdfs/07john1.pdf ).
Having connected the cable to Port 1 of VNA, the planecap becomes an unknown load being tested. The S11, thus the impedance of the interplane capacitance of pwr/gnd planes, would be shown in a Smith Chart in the VNA screen over a wide frequency range.

BTW, a hand-held battery-powered (VNA + Spectrum Analyzer) has been on the market. Want to know the detail? Send me a short note off-line to me at "bma@anritsu.com".

From the frequency response of S11 in the Smith chart, we are able to tell what is the upper limit for the operating frequency of interplane capacitance. IMHO, we don't need to measure S21 or S12, as Dr. Johnson and Dr. Hubing did in their articles. They investigated transmission properties along a PCB using two cables, one sending signal from Port 1 of VNA, and the other receiving signal for Port 2 of VNA. For our simpler task, however, measuring S11 with only one cable is enough.

In addition to the planecap, we may use the hand-held (VNA+SA) to investigate many other important features of power distribution system in the PCB in the one-cable configuration, as shown in the Figure:

- Vcc noise. (See http://signalintegrity.com/articles/edn/healthypower.htm)
- Can we reduce the decoupling capacitor number? People usually put too many. ...
- Appropreate locations of decap. Closer is better? Or can be shared by other ICs.
- What is the boundary of planecap and decaps.

P.S.
How to use VNA in Time Domain, as suggested by Howard Johnson, is also an interesting topic. I'd like to invite a discussion either on-line or off-line.

Regards,
Barry Ma bma@ANRITSU.com
Anritsu www.anritsu.com
Morgan Hill, CA 95037
Tel. 408-778-2000 x 4465

Thanks.
Best Regards,
Barry Ma <bma@anritsu.com>
ANRITSU www.anritsu.com
Morgan Hill, CA 95037
Tel. 408-778-2000 x 4465
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