RE: [SI-LIST] : Board Stackup - again ...

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From: Mark Gill (gillmf@nortelnetworks.com)
Date: Fri Jun 02 2000 - 11:58:16 PDT


Doug -

From an EMC perspective, I've seen dense, 12 layer designs where power and
ground have been separated by as many as two signal layers, with 50 MHz and
greater clocks, and pass Class B (not to mention under-optimized decoupling
capacitors). I don't think there is such a thing as a hard rule across the
board, but rather specific rules are more appropriate to particular
situations/designs.

Regards,

Mark Gill, P.E.
EMC/Safety/NEBS Design
Nortel Networks - RTP, NC, USA

> -----Original Message-----
> From: Doug McKean [SMTP:dmckean@corp.auspex.com]
> Sent: Friday, June 02, 2000 2:25 PM
> To: SI - List Discussion Group
> Subject: [SI-LIST] : Board Stackup - again ...
>
> What are the opinions of separating power and
> ground planes with a signal layer?
>
> Is it a *hard fast rule* that never shall they be separated?
> Are there some caveats conditions that allow separation?
>
> Assuming that everything except stackup remains the same,
> is there some significant measurable difference with say
> a digital board handling clocks around 40 MHz to 80 MHz
> and bus speeds of say PCI, and fsb of 133 (maybe even 200)
> and/or Ethernet with power and ground planes separated with
> a signal layer as opposed to one that has them adjacent?
>
> I've been of the opinion that power and ground planes should
> NEVER be separated, but lately, I'm not so sure about that.
>
> Comments?
>
> - Doug McKean
>
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