RE: [SI-LIST] : Split Plane

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From: Barry Ma (barry_ma@altavista.com)
Date: Wed May 24 2000 - 10:51:29 PDT


Another reason, I guess, is that you are not confident to use pwr planes as signal return planes. You said: "We pulled out all the stops to ensure every signal layer is referenced to a ground plane, rather than a power plane, which I understand should give better EMC performance."

I'd like to say it again, it's OK to use pwr planes if you have enough interplane capacitance.

Regards,
Barry Ma
bma@ANRITSU.com
------------
On Wed, 24 May 2000, "Brad Crowell" wrote:

>
> Christoph
>
> I agree with your suggestion and we did consider this but the additional
> cost was the overriding factor.
>
> Brad
>
> > -----Original Message-----
> > From: owner-si-list@silab.eng.sun.com
> > [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Christoph Hillen
> > Sent: Wednesday, May 24, 2000 10:29 AM
> > To: si-list@silab.eng.sun.com
> > Subject: RE: [SI-LIST] : Split Plane
> >
> >
> >
> >
> > Brad,
> >
> > Did you think about doing this job using MicroVia technology?
> > In this case you would be able to cover the top and bottom layer
> > with ground, as the Fanout-Vias are in the pad.
> > So the top and bottom ground plane will be real planes over the
> > whole board! Then the stackup could look like this:
> >
> > GND
> > Signal
> > Signal
> > 3.3V
> > GND
> > Signal
> > Signal
> > GND
> > 5V
> > Signal
> > Signal
> > GND
> >
> > Because of the MicroVias, you will be able to route much more effective, as they
> > don't block other layers - perhaps you can even save one or two signal layers.
> > If you are looking for good EMI performance, this would be a good idea.
> >
> > Christoph Hillen
> > Utimaco Safeware AG
> > Germany

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