From: Vinu Arumugham ([email protected])
Date: Thu May 18 2000 - 14:35:48 PDT
Barry Ma wrote:
> Vinu,
>
> I am glad to hear of different opinion to my second question:
> "Do we really have to limit the distance letting the charge have enough time to move from the cap to the chip during the rise time interval?"
>
> You said: "The decap should be much closer than 0.5 Tr to be of use."
>
> If Tr = 1 ns, the corresponding distance is approximately equal to 14 cm in FR4. There's no problem to locate decaps much closer than 7 cm, following your opinion. If Tr = 0.2 ns (likely happens in 5 - 10 years), it might be difficult to implement it - much closer than 1.4 cm. Then further Tr = 0.1 ns, ... much closer than 0.7 cm, and so on ... That's why I raised the question.
>
This is already a problem for some devices and package capacitance is used to supply the charge. Even in such cases, the decap should be placed as close as possible in order to provide enough charge if the device is driving long transmission line loads.
>
> Can you detail your opinion? Thanks.
>
> Barry Ma
> [email protected]
>
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