RE: [SI-LIST] : Differential Clock Signal Pair

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From: Greim, Michael (mgreim@mc.com)
Date: Mon May 15 2000 - 14:12:03 PDT


Hi Brian,

I would say that depending on who you talk to, one could
fall into either camp. For item one, remember that as the
spacing is minimized, the coupling between the traces increases.
This reduces the differential impedance of the pair. By increasing
spacing to the plane (increasing char impedance) the differential
impedance will increase. Note: diff impedance is not simply
doubling the characteristic impedance when the nets are closely
spaced. However, you may not be able to
tolerate this increase in board thickness. By spacing the
nets tight you are in effect reducing the crosstalk from other
signals as this crosstalk will often be rejected as common
mode noise.

However, as Lee Ritchey made the point, there is nothing
that necessarily forces you to route everything right next
to each other. The only issues that you will run into is the
fact that you lose your common mode noise rejection and
you may have some eye pattern impact due to delay differences
due to material and manufacturing tolerance (assuming that
your route them on totally different layers. However, if you
can keep track of and control interference from other sources,
method two may be preferable.

To answer your question simply, for our existing technology
implentation, we are in camp one.

Best Regards,

Michael Greim
> -----Original Message-----
> From: Brian Seol [SMTP:BSeol@tessera.com]
> Sent: Monday, May 15, 2000 12:38 PM
> To: si-list@silab.eng.sun.com
> Subject: [SI-LIST] : Differential Clock Signal Pair
>
> Hi everyone,
>
> I have a simple question about trace layout design for a differential
> clock
> signal pair of high-speed CMOS memory packages. I have two design
> guidelines for that as follows:
>
> 1. SPACING between a differential clock signal trace pair must be
> MINIMIZED as well as matched in length in order to reduce noise.
>
> 2. Differential clock signal trace pair must be matched in length in order
> to achieve matched electrical characteristics, but SPACING between
> them must be MAXIMIZED in order to reduce crosstalk noise.
>
> Which do you prefer?
>
> Thanks and regards,
>
> Brian
>
>
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