From: Sandy Taylor ([email protected])
Date: Tue Nov 16 1999 - 15:01:23 PST
> Can you point to any existing papers on linearized output impedance, and
> any ASIC mfgs currently offering this? Thanks.
Two references that touch on it are:
Gunning, "A CMOS Low Voltage Swing Transmission Line Transceiver". ISSCC 92
Horel & Lauterbach, "UltraSPARC-III: Designing third generation 64-bit Performance" IEEE Micro May/Jun 99
I do not know of any asic support for this.
Bob Perlman wrote:
> A nice pedestal right in the transition region that lasts
> perhaps as long as the risetime/falltime? Yecch!
The situation you described would lead to a short pedestal with a duration
about equal to the non overlap time of the drivers.
The problem I saw was when you have multiple drivers on a bus
running with fast turnaround times. You must control all spurious reflections.
If there is energy coming into the driver from the transmission line you
do not want to reflect it, this will degrade your noise margin.
The more the driver looks like a fixed impedance
connected to a time dependent voltage source the quicker you will
be able to damp out reflections on the bus.
Charles Hill gave a good example of this.
"Maintaining (a constant) source impedance therefore a high return loss"
is exactly the right thing to do. Sai will show a great method for implementing this
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